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| fn8837 rev. 2.00 page 1 of 73 jan 29, 2018 fn8837 rev. 2.00 jan 29, 2018 zl9024m digital dc/dc pmbus 33a module datasheet the zl9024m is a 33a step-down dc/dc power supply module with integrated digital pwm controller, synchronous power switches, a n inductor, and passives. only bulk input and output capacitors are needed to finish the design. the 33a o f continuous output current can be delivered without a need of airflow or a heatsink. the thermally enhanced h da module is capable of dissipating heat directly into the pcb. the zl9024m uses chargemod e? control architecture, which responds to a transient load within a single switching cycle. the zl9024m comes with a preprogrammed configuration fo r operating in a pin-strap mode; output voltage, switching frequency, and device smbus address can be programmed with external resistors. more configurations, such as soft-start and fault limits, can be easily programmed or changed using pmbus compliant serial bus interface. pmbus can be used to monitor voltages, current, temperatures, and fault status. the zl9024m is supported by powernavigator? software, a graphical user in terface (gui) that can be used to configure modules to a desired solution. the zl9024m is availabl e in a 40 ld compact 17mmx19mm hda module with a very low profile height of 3.55mm, suitable for automated assembly by standard surface mount e quipment. the zl9024m is rohs compliant by exemption. related literature for a full list of related documents , visit our website ? zl9024m product page features ? complete digital switch mode power supply ?v in range: 2.75v to 4v ? programmable v out range: 0.6v to 1.5v ? pmbus compliant i 2 c communication interface ? programmable v out , margining, uv/ov, i out limit, soft-start/stop, s equencing, and external synchronization ? monitor: v in , v out , i out , temperature, duty cycle, switching frequency, and faults ? chargemode cont rol architecture ?1.2% v out accuracy over line, load, and temperature ? power-good indicator ? over-temperature protection ? internal non-volatile memory and fault logging ? powernavigator supported ? patented thermally enhanced hda package applications ? server, telecom, sto rage, and datacom ? industrial/ate and networking equipment ? general purpose power f or asic, fpga, dsp, and memory figure 1. complete digital s witch mode power supply figure 2. small package for high power density = / 0 9 2 8 7 9 , 1 9 2 8 7 9 6 ( 1 9 6 ( 1 9 , 1 3 0 % x v , q w h u i d f h 9 ' ' 9 ' 5 9 & 2 8 7 n 6 $ / 5 7 6 ' $ 6 & / 6 * 1 ' 3 * 1 ' & , 1 9 ' ' & 9 ' ' 9 0 2 1 note: 1. only input and output capacitors are required to finish the design. 1 9 m m 1 7 m m 3.55mm
fn8837 rev. 2.00 page 2 of 73 jan 29, 2018 zl9024m contents 1. overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.2 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.3 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.4 pin descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.5 typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2. specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2 thermal information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.3 recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.4 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3. typical performance curves. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4. functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.1 smbus communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.2 output voltage selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.3 soft-start delay and ramp times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.4 power-good. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.5 switching frequency and pll . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.6 loop compensation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.7 undervoltage lockout (uvlo). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.8 smbus module address selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.9 output overvoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.10 output prebias protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.11 output overcurrent protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.12 thermal overload protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.13 digital-dc bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.14 phase spreading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.15 output sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.16 fault spreading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.17 temperature monitoring using the xtemp pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.18 monitoring using smbus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.19 snapshot parameter capture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.20 non-volatile memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5. pcb layout guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6. thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.1 package description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.2 pcb layout pattern design. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.3 thermal vias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.4 stencil pattern design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.5 reflow parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 fn8837 rev. 2.00 page 3 of 73 jan 29, 2018 zl9024m 7. pmbus command summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 8. pmbus data formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 9. pmbus use guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 9.1 summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 10. pmbus commands descriptio n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 11. firmware revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 12. package outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 13. revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 fn8837 rev. 2.00 page 4 of 73 jan 29, 2018 zl9024m 1. overview 1. overview 1.1 block diagram figure 3. zl9024m internal block diagram ' l j l w d o & r q w u r o o h u 6 * 1 ' 9 6 ( 7 6 & / 6 $ / 5 7 6 $ ( 1 3 * 6 < 1 & 6 * 1 ' 3 : 0 2 8 7 3 0 % x v , & , q w h u i d f h 6 ' $ $ ' & & 6 $ 9 6 $ 6 x s h u y l v r u , q w h u q d o 7 h p s 6 h q v r u 3 u r w h f w l r q 2 & 8 & ' 3 : 0 3 / / 6 < 1 & 2 8 7 3 r z h u 0 d q d j h p h q w 6 6 0 d u j l q l q j 2 9 8 9 , q w h u o h d y h 6 h t x h q f h 1 9 0 9 ' ' ( [ w h u q d o 7 h p s ' ' & 6 q d s v k r w ) d x o w 6 s u h d g l q j 2 7 8 7 9 2 8 7 ? + / r j l f 9 , 1 3 * 1 ' 9 0 2 1 ' u l y h u d q g ) ( 7 v 9 , 1 9 ' ' 9 6 ( 1 9 6 ( 1 ; 7 ( 0 3 ; 7 ( 0 3 0 * 1 / ' 2 / ' 2 $ ' & 9 5 9 / ' 2 9 5 9 ' ' & ) % 3 * 1 ' 9 ' 5 9 s ) & k d u j h 0 r g h & r q w u r o n : : : fn8837 rev. 2.00 page 5 of 73 jan 29, 2018 zl9024m 1. overview 1.2 ordering information part number ( notes 2 , 3 , 4 , 5 ) part marking firmware revision ( note 6 ) temp range (c) package (rohs compliant) pkg. dwg. # zl9024mairz zl9024ma g0100 -40 to +85 40 ld 17x19 hda y40.17x19 zl9024meval1z evaluation board notes: 2. add -t suffix for 500 unit tape and reel option. refer to tb347 for details about reel specifications. 3. add -t1 suffix for 100 unit tape and reel option. refer to tb347 for details about reel specifications. 4. these pb-free plastic packaged products are rohs compliant by eu exemption 7c-i and 7a. they employ special pb-free material sets; molding compounds/die attach materials and nipdau plate-e 4 termination finish, which is compatible with both snpb and pb-free soldering operations. pb-free products are msl classifi ed at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. 5. for moisture sensitivity level (msl), see the zl9024m product information page. for more information about msl, refe r to tb363 . 6. see firmware revision history on page 64 ; only the latest firmware revis ion is recommended for new desi gns. table 1. key differences between family of parts part description v in range (v) v out range (v) i out (a) zl9024m digital dc/dc pmbus single channel 33a module 2.75 - 4 0.6 - 1.5 33 isl8274m digital dc/dc pmbus dual channel 30a/30a module 4.5 - 14 0.6 - 5.0 30/30 ISL8277M digital dc/dc pmbus 25a module 4.5 - 14 0.6 - 5.0 25 isl8278m digital dc/dc pmbus 33a module 4.5 - 14 0.6 - 5.0 33 zl xxxxm f t r z s digital ? module ? designator base ? part ? number firmware ? revision a: ? g0100 operating ? temperature i: ? industrial ? ( \? 40c ? to ? +85c) shipping ? option blank: ? bulk t: ? tape ? and ? reel rohs z: ? rohs ? compliant package ? designator r: ? high ? density ? array ? (hda) fn8837 rev. 2.00 page 6 of 73 jan 29, 2018 zl9024m 1. overview 1.3 pin configuration zl9024m (40 ld hda) top view 1.4 pin descriptions pin label type description 1 ddc i/o a digital-dc? bus. this dedicated bus provides the commu nication channel between devices for features such as sequencing, fa ult spreading, and current shari ng. the ddc pin on all digital-dc devices should be connected toget her. a pull-up resistor is req uired for this application. 2 xtemp+ i differential external temperature sensor positive input pin. 3 xtemp- i differential external temperature sensor negative input pin. 6 vsen+ i differential output voltage sense feedback. connect to p ositive output regulation point. 7 vsen- i differential output voltage sense feedback. connect to n egative output regulation point. 8 vdrv pwr input supply to internal gate driver. connect the vdrv pad to vdd. place a 10f ceramic capacitor at this pin. 12, 23, 31, 34 pgnd pwr power ground. refer to the pcb layout guidelines on page 23 for the pgnd pad connections and decoupling capacitors placement. 9 ' 5 9 9 , 1 ' ' & ; 7 ( 0 3 9 6 ( 1 ; 7 ( 0 3 1 & 9 6 ( 1 1 & 3 * 1 ' 1 & 1 & 6 < 1 & 6 * 1 ' 9 2 8 7 6 * 1 ' 9 6 : + 3 * 1 ' 3 * 1 & 3 * 1 ' 3 + $ 6 ( 1 & 1 & nc salrt sgnd vset mgn pgnd vmon en sda scl sa vdd vddc vr5 v25 vr6 fn8837 rev. 2.00 page 7 of 73 jan 29, 2018 zl9024m 1. overview 11 vin pwr main input supply. refer to the pcb layout guidelines on page 23 for the decoupling capacitors placement from vin to pgnd. 13 vswh pwr switch node. refer to the pcb layout guidelines on page 23 for connecting vswh pads to electrically isolated pcb copper island to dissipate internal h eat. 14 vout pwr power supply output. range: 0.6v to 1.5v. 15, 27, 40 sgnd pwr controller signal ground. refer to the pcb layout guidelines on page 23 for the sgnd pad connections. 16 vdd pwr input supply to digital controller. refer to the pcb layout guidelines on page 23 for the decoupling capacitors placement from vdd to sgnd. 17 en i external enable input. logic high enables the module. 18 scl i serial clock input. a pull- up resistor is required for th is application. 19 sda i/o serial data. a pull-up re sistor is required for this ap plication. 20 salrt o serial alert. a pull-up re sistor is required for this a pplication. 21 sa i serial bus address select pin. refer to table 6 for list of resistor values to set various serial bus address. 22 vmon i input voltage monitoring . use this pin to monitor input voltage. tie to vin through a 20k resistor. 24 mgn i external v out margin control pin. an active h igh (>2v) signal at this pin set s v out margin high, active low (<0.8v) sets v out margin low, and high impedance (float) will bring v out back to nominal voltage. factory default range for margining is nominal v out 5%. when using pmbus to control margin command, leave this pin as no connect. 25 vset i output voltage selection pin. refer to ta b l e 4 for list of resistor values to set various output voltages. 28 pg o power-good output. the power-good output can be open drain that requires a pull-up resistor or push-pull output that can drive a logic input. 30 phase pwr switch node pad for dcr sensing. electrically shorted inside to vswh, but fo r higher current sensing accuracy connect the phase pad to t he vswh pad externally. refe r to the pcb layout guidelines on page 23 . 35 vr6 pwr internal reference supply voltage. tie to the vddc pin. 36 vr5 pwr internal reference supply voltage. tie to the vddc pin. 37 vddc pwr vdd clean. noise at the vdd pin is filtered with ferri te bead and capacitor. connect the vddc pin to the vr6 and vr5 pins. 38 v25 pwr 2.5v internal reference supply voltage. 39 sync i/o the sync pin can be input to external clock for freque ncy synchronization or output to supply clock signals to other modules for sy nchronization. refer to ta b l e 5 for a list of resisto r values to program various switching frequencies. 4, 5, 9, 10, 26, 29, 32, 33 nc these are test pins and are not electrically isolated. leave these pins as no connect. pin label type description fn8837 rev. 2.00 page 8 of 73 jan 29, 2018 zl9024m 1. overview 1.5 typical application circuit figure 4. typical single phase appl ication circuit for 1.2v/33a o utput table 2. zl9024m design guide matr ix and output voltage response vout (v) cout_ bulk (f) cout_ ceramic (f) ascr gain ( note 11 ) ascr residual ( note 11 ) voltage deviation (mv) recovery time (s) load step (a) frequency (khz) ( note 12 ) 0.6 5 x 470 6 x 100 300 70 53 35 0 to 16.5 320 0.6 5 x 470 6 x 100 750 70 38 20 0 to 16.5 533 1 4 x 470 6 x 100 450 80 50 20 0 to 16.5 533 1.2 4 x 470 6 x 100 500 80 55 25 0 to 16.5 533 1.5 3 x 470 5 x 100 500 80 60 20 0 to 16.5 533 notes: 11. ascr gain and residual are designed to achieve a phase margi n higher than 60 and a gain margin higher than 6db in differen t temperatures (ambient temperatur e = -40c, 25c, and 85c). 12. frequency is selected consider ing efficiency and output volt age ripple. 13. 100f (grm31cr60j107me39l) cer amic and 470f (4tpe470mcl) ar e selected for output capacitors in the evaluation board. 14. 3 x 470f (6tpf470mah) and 6 x 47f ceramic (grm32er61c476ke 15l) are used for input capacitors in the evaluation board. notes: 7. r 4 and r 5 are not required if the pmbus host already has i 2 c pull-up resistors. 8. only one r 3 per ddc bus is required when ddc bus is shared with other modu les. 9. r 7 is optional but recommended to s ink possible ~100a back-flow current from the vsen+ pin. back-flow current is present only w hen the module is in a disabled sta te with power still available at the vdd pin. 10. refer to pcb layout guidelines on page 23 for more information. zl9024m vin vout sa vset salrt sda scl ddc vmon vdrv c 1 c 2 + 6 x 47 2 x 470 20k 10 c 6 c 7 + 6 x 100 3 x 470 (poscap) vr6 vr5 v25 vddc vswh phase pmbus address = 0x28 r 3 r 4 r 5 r 6 r 3, r 4, r 5, r 6 = 4.7k r 7 200 vaux 3.3v to 5v v in 2.75v to 4v v out 1.2v, 33a vout_command = 1.2v vdd v dd 4.5v to 5.5v c 5 10 c 4 ( note 9 ) ( notes 7 , 8 ) en sync xtemp+ xtemp- pmbus interface pgnd sgnd vsen+ vsen- fn8837 rev. 2.00 page 9 of 73 jan 29, 2018 zl9024m 1. overview table 3. recommended input and output capacitors vendor value part number panasonic, input cap 470 f, 6.3v, 2917 6tpf470mah murata, input cap 47 f, 16v, 1210 grm32er61c476ke15l murata, input cap 47 f, 6.3v, 1210 grm32er70j476me20 taiyo yuden, input ceramic 47 f, 16v, 1210 emk325bj476mm-t murata, output ceramic 100 f, 6.3v, 1210 grm31cr60j107me39l tdk, output ceramic 100 f, 6.3v, 1210 c3225x5r0j107m fn8837 rev. 2.00 page 10 of 73 jan 29, 2018 zl9024m 2. specifications 2. specifications 2.1 absolute maximum ratings 2.2 thermal information parameter minimum maximum unit input supply voltage, vin pin -0.3 17 v input supply voltage for controller, vdd pin -0.3 17 v input supply gate driver voltage, vdrv pin -0.3 6 v mosfet switch node voltage, vswh pin -0.3 25 v 6v internal reference supply voltage, vr6 pin -0.3 6.6 v 5v internal reference supply voltage, vr5 pin -0.3 6.5 v 2.5v internal reference supply voltage, v25 pin -0.3 3 v logic i/o voltage for ddc, en, mgn, pg, sa, scl, sda, salrt, sync, vmon, vset -0.3 6.0 v analog input voltages value vsen+, xtemp+ -0.3 6.0 v vsen-, xtemp- -0.3 0.3 v esd rating value unit human body model (tested per jesd22-a114f) 2 kv machine model (tested per jesd22-a115c) 200 v charged device model (tested per jesd22-c110d) 750 v latch-up (tested per jesd78 c; class 2, level a) 100 ma caution: do not operate at or near the maximum ratings listed f or extended periods of time. expos ure to such conditions may adversely impact product reliabi lity and result in failures not covered by warranty. thermal resistance (typical) ? ja (c/w) ? jc (c/w) 40 ld hda module ( notes 15 , 16 )8 2.2 notes: 15. ? ja is measured in free air with the module mounted on an evaluati on board 3x4.5inch in size with 2oz surface and 1oz buried planes and multiple via interconnects. the temperature was meas ured inside the module at the hottest point. 16. for ? jc , the case temp location is the center of the package undersi de. parameter minimum maximum unit maximum junction temperature (plastic package) +125 c storage temperature range -55 +150 c pb-free reflow profile refer to tb493 fn8837 rev. 2.00 page 11 of 73 jan 29, 2018 zl9024m 2. specifications 2.3 recommended operating conditions 2.4 electrical specifications parameter minimum maximum unit input supply voltage range, v in 2.75 4 v input supply voltage range for controller, v dd 4.5 5.5 v input supply gate driver voltage, v drv 4.5 5.5 v output voltage range, v out 0.6 1.5 v output current range, i out(dc) ( note 19 )033a operating junction temperature range, t j -40 +125 c v in = 3.3v, v dd = v drv = 5v, f sw = 533khz, c out = 1340f, t a = -40c to +85c, unless otherwise noted. typical values are a t t a = +25c. boldface limits apply across the operating temperature range, - 40c to +85c. parameter symbol test conditions min ( note 17 )typ max ( note 17 )unit input and supply characteristics input supply current for controller i dd v in = 3.3v, v dd = v drv = 5v, v out = 0v, module not enabled 40 50 ma 2.5v internal reference supply voltage v 25 2.25 2.50 2.75 v input supply voltage for controller readback resolution v dd_read_res 20 mv input supply voltage for controller readback total error ( note 20 ) v dd_read_err pmbus read 2 %fs output characteristics output voltage adjustment range v out_range 0.54 2 v output voltage set-point range v out_res configured using pmbus 0.025 %v out output voltage set-point accuracy ( note 18 ) v out_accy includes line, load, and temperature -1.2 +1.2 %fs output voltage readback resolution ( note 20 ) v out_read_res 0.15 %fs output voltage readback total error ( note 20 ) v out_read_err pmbus read -2 +2 %fs output current readback resolution i out_read_res isense_config with factory default setting 0.15 a output current range ( note 19 ) i out_range 33 a output current readback total error i out_read_err pmbus read at maximum load 3 a soft-start and sequencing delay time from enable to v out rise t on_delay configured using pmbus 2 300 ms t on_delay accuracy t on_delay_accy 2 ms output voltage ramp-up time t on_rise configured using pmbus 1 120 ms fn8837 rev. 2.00 page 12 of 73 jan 29, 2018 zl9024m 2. specifications output voltage ramp-up time accuracy t on_rise_accy 250 s delay time from disable to v out fall t off_delay configured using pmbus 2 300 ms t off_delay accuracy t off_delay_accy 2 ms output voltage fall time t off_fall configured using pmbus 0.5 120 ms output voltage fall time accuracy t on_fall_accy 250 s power-good power-good delay v pg_delay configured using pmbus 0 5000 ms temperature sense temperature sense range t sense_range configurable using pmbus -50 150 c internal temperature sensor accuracy int_temp accy tested at +100c -5 +5 c external temperature sensor accuracy xtemp accy using 2n3904 npn transistor 5 c fault protection v dd undervoltage threshold range v dd_uvlo_range measured internally 4 v v dd undervoltage threshold accuracy ( note 20 ) v dd_uvlo_accy 2 %fs v dd undervoltage response time v dd_uvlo_delay 10 s v out overvoltage threshold range v out_ov_range factory default 1.15v out v configured using pmbus 1.05v out v out_max v v out undervoltage threshold range v out_uv_range factory default 0.85v out v configured using pmbus 0 0.95v out v v out ov/uv threshold accuracy ( note 18 ) v out_ov/uv_accy -2 +2 % v out ov/uv response time v out_ov/uv_delay 10 s output current limit set-point accuracy ( note 20 ) i limit_accy tested at i out _avg_oc_fault_limit = 40a 10 %fs output current fault response time ( note 21 ) i limit_delay factory default 3 t sw over-temperature protection threshold (controller junction temperature) t junction factory default 115 c configured using pmbus -40 115 c thermal protection hysteresis t junction_hys 15 c oscillator and switching characteristics switching frequency range f sw_range 296 1067 khz switching frequency set-point accuracy f sw_accy -5 +5 % v in = 3.3v, v dd = v drv = 5v, f sw = 533khz, c out = 1340f, t a = -40c to +85c, unless otherwise noted. typical values are a t t a = +25c. boldface limits apply across the operating temperature range, - 40c to +85c. (continued) parameter symbol test conditions min ( note 17 )typ max ( note 17 )unit fn8837 rev. 2.00 page 13 of 73 jan 29, 2018 zl9024m 2. specifications minimum pulse width required from external sync clock ext_sync pw measured at 50% amplitude 150 ns drift tolerance for external sync clock ext_sync drift -10 +10 % logic input/output characteristics bias current at the logic input pins i logic_bias ddc, en, mgn, pg, sa, scl, sda, salrt, sync, vmon, vset -100 +100 na logic input low threshold voltage v logic_in_low 0.8 v logic input high threshold voltage v logic_in_high 2.0 v logic output low threshold voltage v logic_out_low 2ma sinking 0.5 v logic output high threshold voltage v logic_out_high 2ma sourcing 2.25 v pmbus interface timing characteristic pmbus operating frequency f smb 100 400 khz notes: 17. compliance to datasheet limits is assured by one or more met hods: production test, charac terization, and/or design. 18. v out measured at the termination of the vsen+ and vsen- sense point s. 19. the max load current is determined by the thermal typical performance curves on page 14 provided with this document. 20. fs stands for full scale of the recommended maximum operat ing range. 21. tsw stands for time period of operation switching frequenc y. v in = 3.3v, v dd = v drv = 5v, f sw = 533khz, c out = 1340f, t a = -40c to +85c, unless otherwise noted. typical values are a t t a = +25c. boldface limits apply across the operating temperature range, - 40c to +85c. (continued) parameter symbol test conditions min ( note 17 )typ max ( note 17 )unit fn8837 rev. 2.00 page 14 of 73 jan 29, 2018 zl9024m 3. typical performance curves 3. typical performance curves operating conditions: v in = 3.3v, v dd = v drv = 5v, t a = +25c, no airflow, typical values are used unless otherwise noted. i out derating curves were plotted at t j = +115c figure 5. efficiency vs output current at v in = 3.3v, for various output voltages figure 6. derating curve 3.3v in to 1.2v out , 533khz figure 7. transient response (0a to 16.5a, >15a/s), 3.3v in to 1.5v out , 533khz figure 8. transient response (0a to 16.5a, >15a/s), 3.3v in to 1.2v out , 533khz figure 9. transient response (0a to 16.5a, >15a/s), 3.3v in to 1.0v out , 533khz figure 10. transient response (0a to 16.5a, >15a/s), 3.3v in to 0.6v out , 533khz 65 70 75 80 85 90 95 0102030 0.6v_320khz 0.6v_533khz 1v_533khz 1.2v_533khz 1.5v_533khz efficiency (%) load current (a) 0 5 10 15 20 25 30 35 25 45 65 85 105 125 0lfm 200lfm 400lfm load current (a) ambient temperature (c) v out (50mv/div) i out (10a/div) 50s/div v out (50mv/div) i out (10a/div) 50s/div v out (50mv/div) i out (10a/div) 50s/div v out (50mv/div) i out (10a/div) 50s/div fn8837 rev. 2.00 page 15 of 73 jan 29, 2018 zl9024m 3. typical performance curves figure 11. transient response (0a to 16.5a, >15a/s), 3.3v in to 0.6v out , 320khz figure 12. startup, 3.3v in to 1.2v out , 0a figure 13. startup, 3.3v in to 1.2v out , 33a figure 14. immedi ate shutdown, 3.3v in to 1.2v out , 0a figure 15. immediate shutdown, 3.3v n to 1.2v out , 33a figure 16. soft-off, 3.3v in to 1.2v out , 33a v out (50mv/div) i out (10a/div) 50s/div v out (500mv/div) pg (5v/div) 5ms/div v out (500mv/div) pg (5v/div) 5ms/div v out (500mv/div) pg (5v/div) 500ms/div pg (5v/div) v out (500mv/div) 200s/div pg (5v/div) v out (500mv/div) 5ms/div fn8837 rev. 2.00 page 16 of 73 jan 29, 2018 zl9024m 4. functional description 4. functional description 4.1 smbus communications the zl9024m provides an smbus dig ital interface that enables th e user to confi gure all aspects of the module operation as well as monitor the input and output parameters. t he zl9024m can be used with any smbus host device. in addition, the module is compa tible with pmbus power system m anagement protocol specification parts i and ii version 1.2. the zl9024m accepts most standard pm bus commands. when con trolling the device with pmbus commands, it is recomm ended that the enable pin be t ied to sgnd. the smbus device address is the only parameter that must be set by external pins. all other device parameters can be set with pmbus commands. 4.2 output voltage selection the output voltage can be set to a voltage between 0.6v and 1.5 v if the input voltage is higher than the desired output voltage by an amount sufficient to maintain regulation. the vset pin is used to set the output voltage to levels as sho wn in table 4 . the r set resistor is placed between the vset pin and sgnd. a standard 1% re sistor is r ecommended. the output voltage can also be set to any value between 0.6v an d 1.5v using the pmbus command vout_command. by default, v out_max is set 110% higher than v out set by the pin-strap resistor , which can be ch anged to any value up to 2v with the pmbus command vout_max. table 4. output voltage resistor settings v out (v) r set (k) 0.60 10 0.65 11 0.70 12.1 0.75 13.3 0.80 14.7 0.85 16.2 0.90 17.8 0.95 19.6 1.00 21.5, or connect to sgnd 1.05 23.7 1.10 26.1 1.15 28.7 1.20 31.6, or open 1.25 34.8 1.30 38.3 1.40 42.2 1.50 46.4 fn8837 rev. 2.00 page 17 of 73 jan 29, 2018 zl9024m 4. functional description 4.3 soft-start delay and ramp times it may be necessary to set a delay from when an enable signal i s received until the output voltage starts to ramp to its target value. in addition, t he designer may wish to precise ly set the time required for v out to ramp to its target value after the delay period has expired. these features can be used as part of an overall inrush current management strategy or to precisely control how fast a load ic is turned o n. the zl9024m gives the s ystem designer several options for precisely and independently controlling both the de lay and ramp time period s. the soft-start delay period begins when the en pin is asserted and ends when the del ay time expires. the soft-start delay and ramp tim es can be programmed to custom values with the pmbus commands ton_delay and ton_rise. when the delay time is s et to 0ms, the device begins its ramp-up after the internal circuitry has initialized (approximately 2ms). when the soft-st art ramp period is set to 0ms, the output ramps up as quickly as the output load cap acitance and loop settings allow. it is generally r ecommended to set the soft-start ramp to a value greater than 500s to prevent inadvertent fault conditions due to excessive inrush current. 4.4 power-good the zl9024m provides a power-good (pg) signal that indicates th e output voltage is within a specified tolerance of its target level and no fault condition exists. by default, the pg pin asserts if the ou tput is within 10% of the target voltage. these limits and the polarity of the pin can be changed with the pmbus command power_good_on. a pg delay period is defined a s the time from when all conditio ns within the zl9024m for asserting pg are met to when the pg pin is actually asserted. this feature is commonly used instead of using an ext ernal reset controller to control external digit al logic. a pg delay can be programmed wi th the pmbus command power_good_delay. 4.5 switching frequency and pll the devices switching frequency is set from 296khz to 1067khz using the pin-strap method as shown in table 5 on page 17 , or by using the pmbus command frequency_switch. the zl9024m i ncorporates an internal phase-locked loop (pll) to clock the internal circuitry. the pl l can be driven by an exter nal clock source connected to the sync pin. when using the internal oscillator, the sync p in can be configured as a clock source as a external sync to other modules. refer to the sync_config command on page 60 for more information. table 5. switching frequency resistor settings f sw (khz) r set (k) 296 14.7, or connect to sgnd 320 16.2 364 17.8 400 19.6 421 21.5 471 23.7 533 26.1, or open 571 28.7 615 31.6 727 34.8 800 38.3 842 42.2 889 46.4 1067 51.1, or connect to v25 fn8837 rev. 2.00 page 18 of 73 jan 29, 2018 zl9024m 4. functional description 4.6 loop compensation the module is internally compensated using the pmbus command ascr_config. the zl9024m uses the chargemode control algorithm that responds to output current ch anges within a single pwm switching cycle, achieving a smaller total output voltage variation with less ou tput capacitance than traditional pwm controllers. 4.7 undervoltage lockout (uvlo) the vdd undervoltage lockout (uv lo) prevents the zl9024m from o perating when the vdd falls below a preset threshold, indicating th e driver voltage is out of its s pecified range. the input uvl o threshold prevents the zl9024m from operating when the input supply voltage, v in , falls below a preset threshold, which can be changed by using the pmbus command vin_uv_fault_limit. vdd needs to be higher than vdrv_uv_warn_limit for the module t o start up. during startup, apply the v in supply before the vdd bias voltage . otherwise, the device may d eclare an input undervoltage fault condition. 4.8 smbus module address selection each module must have its own u nique serial address to distingu ish between other devices on the bus. the module address is set by conn ecting a resistor between the sa pin and sgnd. table 6 lists the available module addresses. table 6. smbus address resistor selection r sa (k) smbus address 10 19h 11 1ah 12.1 1bh 13.3 1ch 14.7 1dh 16.2 1eh 17.8 1fh 19.6 20h 21.5 21h 23.7 22h 26.1 23h 28.7 24h 31.6 25h 34.8, or connect to sgnd 26h 38.3 27h 42.2, or open 28h 46.4 29h 51.1 2ah 56.2 2bh 61.9 2ch 68.1 2dh 75 2eh 82.5 2fh 90.9 30h 100 31h fn8837 rev. 2.00 page 19 of 73 jan 29, 2018 zl9024m 4. functional description 4.9 output overvoltage protection the zl9024m offers an internal ou tput overvoltage protection ci rcuit that can b e used to protect sensitive load circuitry from being s ubjected to a voltage higher than its pre scribed limits. a hardwar e comparator is used to compare the actual output voltage (seen at the vsen+, vsen- pin s) to a threshold set to 15% higher than the target output voltage (the default se tting). fault threshold can be pr ogrammed to a desired level with the pmbus command vout_ov_fault_limit. if the vsen+ voltage exceeds this threshold, the module will initiate an immediate shutdown without retr y. retry settings can be program med with the pmbus command vout_ov_fault_response. internal to the module, two 100 resistors are populated from v out to vsen+ and sgnd to vsen- to protect from overvoltage conditions in case remote sense traces are not present or accidentally open. as long as differential remote sense traces have low resistance, v out regulation accuracy i s not sacrificed. 4.10 output pre bias protection an output prebias condition exists when an externally applied v oltage is present on a power supplys output before the power supplys control ic is enabled. certain applications require that the converter not be allowed to sink current during start-up if a pre bias condition exists at the ou tput. the zl9024m provides prebias protection by sampling the output voltage prior to initiating an output ramp. if a prebias voltage lower than the target voltage exists after the preconfigured delay period has expired, the target voltage is set to match the exis ting prebias voltage, and both drivers are enabled. the out put voltage is then ramped to the final regulati on value at the preconfigured ramp rate. the actual time the output takes to ramp from the prebias volta ge to the target voltage varies, depending on the prebias voltage, however, the total time elapsed from when the delay period expires and wh en the output reaches its target value will match the preconfigured r amp time (see figure 17 ). if a prebias voltage is higher th an the target voltage after th e preconfigured delay period has expired, the target voltage is set to match the existing prebias voltage, and both drivers are enabled with a pwm duty cycle that would ideally create the prebias voltage. figure 17. output responses to prebias voltages desired output voltage prebias voltage v out time ton- delay ton- rise desired output voltage prebias voltage v out time v prebias < v target v prebias > v target ton- rise ton- delay fn8837 rev. 2.00 page 20 of 73 jan 29, 2018 zl9024m 4. functional description when the preconfigured soft-star t ramp period has expired, the pg pin is asserted (assuming the prebias voltage is not higher than the overvoltage limit). the pwm then adjusts it s duty cycle to match the original target voltage, and the output ramps down to the preconfigured output voltage. if a prebias voltage is higher than the overvoltage limit, the device does not initiate a tu rn-on sequence and declares an overvoltage fault condition. t he device then responds based on the output overvolta ge fault response setting programmed with the pmbus com mand vout_ov_fault_response. 4.11 output overcurrent protection the zl9024m is protected from damage if the output is shorted t o ground or if an overload condition is imposed on the output. the average output overcurrent fault threshold can be programmed by the pmbus command iout_avg_oc_fault_limit while th e peak output ov ercurrent fault threshold can be programmed by the pmbus command iout_oc_fault_limi t. the default r esponse from an average overcurrent fault is an immediate shutdown without retry. a continuous retry can be ena bled using the pmbus command mfr_iout_oc_fault_response. 4.12 thermal overload protection the zl9024m includes a thermal se nsor that continuously measure s the internal tempera ture of the module and shuts down the contro ller when the temper ature exceeds the pres et limit. the def ault temperature limit is set to +115c in the factory, but can be changed with the pmbus comman d ot_fault_limit. note that the temperature reading from the pmbus command is the temperature o f the internal controller, which is lower than the junction temperature of the module. the default response from an over-temperature fault is an immed iate shutdown without retry. retry settings can be programmed with the pmbus command ot_fault_response. if the user has configured the m odule to retry, the controller waits the preset delay perio d (if configured to do so) and then checks the m odule temperature. if the temperature has dropped below a threshold that is approximately +15c lower than the selected t emperature fault limit, the cont roller attempts to restart . if the temperature still exceeds the fault lim it, the controller waits the preset delay period and retries again. 4.13 digital-dc bus the digital-dc communications (ddc) bus is used to communicate between renesas digital power modules and digital controllers. this dedicat ed bus provides the communicat ion channel between devi ces for featur es such as sequencing and fault s preading. the ddc pin on all digital-dc d evices in an applicatio n should be connected together. a pull-up resistor is required on the ddc bus in orde r to guarantee the rise time, as shown in equation 1 : where r pu is the ddc bus pull -up resistance and c load is the bus loading. the pull-up resistor can b e tied to an external 3.3v or 5v supply as lo ng as this voltage is present p rior to or during device po wer-up. in principle, each device connected to the ddc bus p resents approximately 10pf of capacitive loading, and each inch of fr4 pcb trace introduces approximately 2pf. the ideal design uses a cen tral pull-up resistor that i s well-matched to the total load capacitance. 4.14 phase spreading when multiple point-of-load converters share a common dc input supply, it is desirable to adjust the clock phase offset of each device, such that not all devices start to switc h simultaneously. setting e ach converter to start its switching cycle at a different point in time, can dramatically reduce input capacitance re quirements and efficiency losses. because the peak current d rawn from the input supply is effectively spread out ove r a period of time, the peak current drawn at any given moment is reduced, and the powe r losses proportional to the i rms 2 are reduced dramatically. rise time r pu ? c load 1 ? s ? = (eq. 1) fn8837 rev. 2.00 page 21 of 73 jan 29, 2018 zl9024m 4. functional description to enable phase spreading, all converters must be synchronized to the same switching clock. the phase offset of each device can also be set to an y value between 0 and 360 in 22.5 increments with the pmbus command interleave. 4.15 output sequencing a group of digital-dc modules or d evices can be configured to p ower-up in a predetermined sequence. this feature is especially useful when powering advanced processors, (fpgas and asics that r equire one supply to reach its operating voltage) prio r to another supply reaching i ts operating voltage in or der to avoid latch-up. multidevice sequencing can be ach ieved by configuring each devi ce with the pmbus command sequence. multiple device sequencing is configured by issuing pmbus comma nds to assign the pr eceding device in the sequencing chain as well as the d evice that follows in the sequ encing chain. the enable pins of all devices i n a sequencing g roup must be ti ed together and driven high to initiate a sequenced turn-on of the group. enable mus t be driven low to initiate a s equenced turnoff of the group. 4.16 fault spreading digital dc modules and devices can be configured to broadcast a fault event over the ddc bus to the other devices in the group with the pmbus command dd c_group. when a non-destructive fault occur s and the device is configured to shut down on a fault, the device shuts down and b roadcasts the fault event over the ddc bus. the other devices on the ddc bus shut down simultaneously, if confi gured to do so, and attempt to restart in their prescribed order. 4.17 temperature monitori ng using the xtemp pin the zl9024m supports measurement of an external device temperat ure using either a thermal diode integrated in a processor, fpga or asic, or usi ng a discrete diode-connected 2n 3904 npn transistor. figure 18 illustrates the typical connections required. the external temperature sensors can be used to prov ide the temperat ure reading for over-temperature and under-temperature faults. these options fo r the external temperature sensors are enabled using the user_config pmbus command. figure 18. external temperature monitoring xtemp+ xtemp- xtemp+ xtemp- zl9024m zl9024m 2n3904 p fpga dsp asic discrete npn embedded thermal diode fn8837 rev. 2.00 page 22 of 73 jan 29, 2018 zl9024m 4. functional description 4.18 monitoring using smbus a system controller can monitor a wide variety of different zl9 024m system parameters with pmbus commands: ? read_vin ? read_vout ? read_iout ? read_temperature_1 ? read_temperature_2 ? read_duty_cycle ? read_freqeuncy ? read_vdrv 4.19 snapshot parameter capture the zl9024m offers a special featu re that enables the user to c apture parametric data and some fault statuses during normal operation or following a fault. a detailed description i s provided in pmbus commands description on page 33 under the pmbus command sna pshot and snapshot_control. 4.20 non-volatile memory the zl9024m has internal non-volat ile memory that stores user c onfigurations. integrat ed security measures ensure that the user can only restore the mo dule to a level tha t has been made availabl e to them. during the initialization process, the zl90 24m checks for stored values co ntained in its interna l non-volatile memory. modules are shipped with factory defaults configuration and mos t settings can be overwritten with pmbus commands and can be stored in non-volatile memory with the pmbu s command store_user_all. fn8837 rev. 2.00 page 23 of 73 jan 29, 2018 zl9024m 5. pcb layout guidelines 5. pcb layout guidelines to achieve stable operation, low losses, and good thermal perfo rmance, some layout consi derations are necessary. ? establish separate sgnd and pg nd planes, then connect sgnd to the pgnd plane as shown in figure 20 on page 24 in the middle layer. for making connections between sgnd/pgnd on the top layer and other layers, use multiple vias for each pin to con nect to the inner sgnd/pgnd la yer. do not connect sgnd directly to pgnd on a top layer. connecting sgnd direct ly to pgnd without establishin g an sgnd plane will bypass the decoupling capacitor at internal reference supplies, making the controller susceptible to noise. ? place enough ceramic capacitors between vin and pgnd, vout and pgnd, and bypass cap acitors between vdd and the ground plane, as close to the module as possible to min imize high frequency noise. ? use large copper areas for the power path (vin, pgnd, vout) to minimize conduction loss and thermal stress. also, use multiple vias to connect the power planes in differen t layers. extra ceramic cap acitors at vin and vout can be placed on the bottom layer under the vin and vout pads w hen multiple vias are used for connecting copper pads on top and bottom layers. ? connect differential remote sen sing traces to the regulation p oint to achieve a tight output voltage regulation. route a trac e from vsen+ to the point-of-load where the tight output voltage is desired. avoid routing any sensitive signal traces, such as the vsense signal near the vswh pads. ? connect differential remote sen sing traces to the external tem perature sensing point. k eep the traces as short as possible. if applicable, place the trace in the inner layer wit h the ground plane on the layer immediately below and on top of the traces. ? for noise sensitive applicatio ns, it is recommended to connect vswh pads only on the top layer; however, thermal performance is sacrificed. externa l airflow might be required t o keep module heat at th e desired level. for applications in which switching noise is less critical, an exce llent thermal performan ce can be achieved in the zl9024m module by increasing copp er mass attached to the vswh p ad. to increase copp er mass on the vswh node, create copper islands in the middle and bo ttom layers und er the vswh pad and connect them to the top layer with multiple vias. shield those copper islands with a pgnd lay er to avoid any interference to noise sensitive signals. fn8837 rev. 2.00 page 24 of 73 jan 29, 2018 zl9024m 5. pcb layout guidelines figure 20. recommended layout - connect sgnd to pgnd in the middle pcb layer after establis hing separate sgnd and pgnd figure 19. external temperature monitoring ( 1 6 < 1 & 6 & / 6 ' $ 6 $ / 5 7 6 $ 0 * 1 9 6 ( 7 1 & 6 * 1 ' ; 7 ( 0 3 9 6 ( 1 ; 7 ( 0 3 1 & 9 6 ( 1 1 & $ % & 6 * 1 ' 3 $ ' 9 ' ' 9 2 8 7 6 * 1 ' 9 6 : + 9 , 1 3 * 1 ' 3 * 1 & 3 * 1 ' 3 + $ 6 ( 1 & 1 & 9 ' ' & 9 5 9 5 9 5 9 0 2 1 & 9 , 1 & 9 ' ' 6 * 1 ' 3 * 1 ' ' ' & 9 ' 5 9 & 9 2 8 7 1 & & 9 ' 5 9 3 * 1 ' 3 * 1 ' 1 & 3 * 1 ' & r q q h f w 6 * 1 ' w r 3 * 1 ' l q w k h p l g g o h o d \ h u 6 * 1 ' 6 * 1 ' 3 * 1 ' 3 * 1 ' 6 * 1 ' 3 * 1 ' 6 * 1 ' fn8837 rev. 2.00 page 25 of 73 jan 29, 2018 zl9024m 6. thermal considerations 6. thermal considerations experimental power loss curves along with ja from thermal modeling analysis can be used to evaluate the the rmal consideration for the module. the derating curves are derived f rom the maximum power allowed while maintaining the temperature below the maximum junction temperature of +125 c. in actual application , other heat sources and design margin should be considered. the read_internal_temp command val ue in powernavigator is the t emperature reading value of the internal controller. the junction temperature of the power stage in the module may be higher than the read_internal_temp command value . the temperature difference de pends on the operating conditions; in some extreme cases, the junction temperature of the power stage can be 30c higher than the read_internal_temp command value. 6.1 package description the structure of the zl9024m bel ongs to the high density array (hda) no-lead pack age. this kind o f package has advantages such as good thermal and electrical con ductivity, lo w weight, and small size. the hda package is applicable for surface mounting technology a nd is being more readily used in the industry. the zl9024m contains several types of devices, including resistors, cap acitors, inductors, and contro l ics. the zl9024m is a copp er lead-frame based package with exposed copper thermal pad s, which have good electrical an d thermal conductivity. th e copper lead frame and multicomponent assembly is over-molded with polymer mold compou nd to protect these devices. the package outline, a typical p cb land pattern d esign and a ty pical stencil opening edge position are shown on pages 65 , 68 , and 70 respectively. the module has a small size of 17mmx19mmx3.55mm. figure 21 on page 26 shows typical reflow pr ofile parameters. the se guidelines are g eneral design rules. use rs can modify parameters according to their application. 6.2 pcb layout pattern design the bottom of the zl9024m is a lead-frame footprint, which is a ttached to the pcb by a s urface mounting process. the pcb layout pattern is shown starting on page 65 . the pcb layout pattern is an array of solder mask defined pcb lands which align with the perimeters of the hda exposed pa ds and i/o termination dimensions. the thermal lands on the pcb layout also feat ure an array of solder mask de fined lands and should match 1:1 with the package exposed die pad perimet ers. the exposed sol der mask defined pcb land area should be 50 -80% of the available module i/o area. 6.3 thermal vias a grid of 1.0mm to 1.2mm pitch thermal vias, which drops down a nd connects to buried copper plane(s), should be placed under the thermal land. the vias shou ld be about 0.3mm t o 0.33mm in diameter with the barrel plated to about 1.0 ounce copper. although adding more vias (by decreasin g via pitch) will improve the thermal performance, diminishing returns will be seen as more and more vias are added. simply use as many vias as practical for the thermal land size and your board design rules allow. 6.4 stencil pattern design reflowed solder joints on the pe rimeter i/o lands should have a bout a 50m to 75m (2 mil to 3 mil) standoff height. the solder paste stencil design is the first step in de veloping optimized, reliable solder joints. stencil aperture size to solder mask defined pcb land size rati o should typically be 1:1. the aperture width can be reduced slightly to help prevent solder bridging between adjace nt i/o lands a typical s older stencil pattern is shown in the package outline drawing section starting on page 65 . the user should consider the symmetry of the whole stencil pattern when designing its pads. a laser cut, sta inless steel stencil with electropolished trapezoidal walls is recommended. electropolishing smooths the aperture w alls resulting in redu ced surface friction and better paste release, which reduces voids. using a trapezoidal section aperture (tsa) als o promotes paste release and forms a brick lik e paste deposit that assists in firm com ponent placemen t. a 0.1mm to 0 .15mm stencil thickness is recommended for this large pitch hda. fn8837 rev. 2.00 page 26 of 73 jan 29, 2018 zl9024m 6. thermal considerations 6.5 reflow parameters due to the low mount height of the hda, "no clean" type 3 solde r paste per ansi/j-std- 005 is recommended. nitrogen purge is also recommended during reflow. a system boar d reflow profile depends on the thermal mass of the entire populated board, thus it is not practical to define a specific soldering profile just for the hda. the profile given in figure 21 is provided as a guide line, to be customi zed for varying manuf acturing practices and applications. figure 21. typical reflow profile 0300 100 150 200 250 350 0 50 100 150 200 250 300 temperature (c) duration (s) slow ramp (3c/s max) and soak from +150c to +200c for 60s~180s ramp rate ? 1.5c from +70c to +90c peak temperature ~+245c; typically 60s-150s above +217c keep less than 30s within 5c of peak temp. fn8837 rev. 2.00 page 27 of 73 jan 29, 2018 zl9024m 7. pmbus command summary 7. pmbus command summary command code command name description type data format default value default setting page 01h operation sets enable, disable, and v out margin modes. r/w byte bit 33 02h on_off_config configures the en pin and pmbus commands to turn the unit on/off r/w byte bit 17h hardware enable, immediate off 33 03h clear_faults clears fault indications. send byte 33 15h store_user_all stores all pmbus values written since last restore at user level. send byte 34 16h restore_user_all restores pmbus settings that were stored using store_user_all. send byte 34 20h vout_mode preset to defined data format of v out commands. read byte bit 13h linear mode, exponent = -13 34 21h vout_command sets the nominal value of the output voltage. r/w word l16u pin-strap 34 23h vout_cal_offset applies a fixed offset voltage to the vout_command. r/w word l16s 0000h 0v 35 24h vout_max sets the maximum possible value of v out . 110% of pin-strap v out . r/w word l16u 1.1 * vout pin-strap 35 25h vout_margin_high sets the value of the v out during a margin high. r/w word l16u 1.05 * vout pin-strap 35 26h vout_margin_low sets the value of the v out during a margin low. r/w word l16u 0.95 * vout pin-strap 35 27h vout_transition_ rate sets the transition rate during margin or other change of v out . r/w word l11 ba00h 1v/ms 36 28h vout_droop sets the loadline (v/i slope) resistance for the rail. r/w word l11 0000h 0mv/a 36 33h frequency_switch sets the switching frequency. r/w word l11 pin- strap 36 37h interleave configures a phase offset between devices sharing a sync clock. r/w word bit set based on pmbus address 37 38h iout_cal_gain sense resistance for inductor dcr current sensing. r/w word l11 b29ah 0.65m 37 39h iout_cal_offset sets the curre nt-sense offset. r/w word l11 0000 h0a 37 40h vout_ov_fault_limit sets the v out overvoltage fault threshold. r/w word l16u 1.15 * vout pin-strap 38 41h vout_ov_fault_ response configures the v out overvoltage fault response. r/w byte bit 80h disable and no retry 38 42h vout_ov_warn_limit sets the v out overvoltage warn threshold. r/w word l16u 1.10 * vout pin-strap 38 43h vout_uv_warn_limit sets the v out undervoltage warn threshold. r/w word l16u 0.90 * vout pin-strap 39 44h vout_uv_fault_limit sets the v out undervoltage fault threshold. r/w word l16u 0.85 * vout pin-strap 39 fn8837 rev. 2.00 page 28 of 73 jan 29, 2018 zl9024m 7. pmbus command summary 45h vout_uv_fault_ response configures the v out undervoltage fault response. r/w byte bit 80h disable and no retry 39 46h iout_oc_fault_limit sets the i out peak overcurrent fault threshold. r/w word l11 e341h 52.062a 40 4bh iout_uc_fault_limit sets the i out peak undercurrent fault threshold. r/w word l11 e58fh -39.062a 40 4fh ot_fault_limit sets the over-temperature fault threshold. r/w word l11 eb98h +115c 40 50h ot_fault_response configures the over-temperature fault response. r/w byte bit 80h disable and no retry 41 51h ot_warn_limit sets the over-temperature warning limit. r/w word l11 eb48h 105c 41 52h ut_warn_limit sets the under-temperature warning limit. r/w word l11 e580h -40c 41 53h ut_fault_limit sets the under-temperature fault threshold. r/w word l11 e4e0h -50c 42 54h ut_fault_response configures the under-temperature fault response. r/w byte bit 80h disable and no retry 42 55h vdrv_ov_fault_limit sets the vdrv overvoltage fault threshold. read word l11 cb00h 6v 42 56h vdrv_ov_fault_ response configures the vdrv overvoltage fault response. read byte bit 80h disable and no retry 42 57h vdrv_ov_warn_ limit sets the vdrv overvoltage warning limit. read word l11 cac0h 5.5v 43 58h vdrv_uv_warn_ limit sets the vdrv undervoltage warning limit. read word l11 ca40h 4.5v 43 59h vdrv_uv_fault_ limit sets the vdrv undervoltage fault threshold. read word l11 ca00h 4v 43 5ah vdrv_uv_fault_ response configures the vdrv undervoltage fault response. read byte bit 80h disable and no retry 43 5eh power_good_on sets the voltage threshold for power-good indication. r/w word l16u 0.9 * v out pin-strap 44 60h ton_delay sets the delay time from enable to start of v out rise. r/w word l11 ca80h 5ms 44 61h ton_rise sets the rise time of v out after enable and ton_delay. r/w word l11 ca80h 5ms 44 64h toff_delay sets the delay time from disable to start of v out fall. r/w word l11 ca80h 5ms 44 65h toff_fall sets the fall time for v out after disable and toff_delay. r/w word l11 ca80h 5ms 45 78h status_byte returns an abbreviated status for fast reads. read byte bit 00h no faults 45 79h status_word returns information with a summary of the unit's fault condition. read word bit 0000h no faults 46 command code command name description type data format default value default setting page fn8837 rev. 2.00 page 29 of 73 jan 29, 2018 zl9024m 7. pmbus command summary 7ah status_vout returns the v out specific status. read byte bit 00h no faults 47 7bh status_iout returns the i out specific status. read byte bit 00h no faults 47 7ch status_vdrv returns specific status specific to the vdrv. read byte bit 00h no faults 48 7dh status_temperature returns the temperature specific status. read byte bit 00h no faults 48 7eh status_cml returns the communication, logic and memory specific status. read byte bit 00h no faults 49 80h status_input returns the v in and external sync clock specific status. read byte bit 00h no faults 49 88h read_vdrv returns the driver voltage reading. read word l11 50 8bh read_vout returns the output voltage reading. read word l16u 50 8ch read_iout returns the output current reading. read word l11 50 8dh read_temperature_1 returns the temperature reading internal to the device. read word l11 50 8eh read_temperature_2 returns the temperature reading from external monitor source. read word l11 50 94h read_duty_cycle returns the duty cycle reading during the enable state. read word l11 50 95h read_frequency returns the measured operating switch frequency. read word l11 50 99h mfr_id sets a user defined identification. r/w block asc null 51 9ah mfr_model sets a user defined model. r/w block asc null 51 9bh mfr_revision sets a user defined revision. r/w block asc null 51 9ch mfr_location sets a user defined location identifier. r/w block asc null 52 9dh mfr_date sets a user defined date. r/w block asc null 52 9eh mfr_serial sets a user define d serialized identifier. r/w block asc null 52 a8h legacy_fault_group sets rail ids of legacy devices for fault spreading. r/w block bit 00000000h no rail id specified 52 adh ic_device_id reports device identification information read block cus 49b01500h renesas zl9024m 53 b0h user_data_00 sets a user defined data. r/w block asc null 53 d0h isense_config configures isense related features. r/w byte bit 25h 256ns blanking time, mid range 53 d1h user_config configur es several user-level features. r/w byte bit 00h open drain pg, xtemp disabled 54 command code command name description type data format default value default setting page fn8837 rev. 2.00 page 30 of 73 jan 29, 2018 zl9024m 7. pmbus command summary d3h ddc_config configures the ddc bus. r/w word bit 0000h set based on pmbus address 54 d4h power_good_delay sets the delay between v out > pg threshold and asserting the pg pin. r/w word l11 ba00h 1ms 55 dfh ascr_config configures ascr control loop. r/w block cus 01500258h residual = 80 gain = 600 55 e0h sequence identifies the rail ddc id to perform multi-rail sequencing. r/w word bit 0000h prequel and sequel disabled 56 e1h track_config configures the voltage tracking modes of the device. read byte bit 00h tracking disabled 56 e2h ddc_group sets rail ddc ids to obey faults and margining spreading information. r/w block bit 00000000h broadcast disabled 57 e4h device_id returns the 16-byte (character) device identifier string. read block asc reads device version 57 e5h mfr_iout_oc_fault_ response configures the i out overcurrent fault response. r/w byte bit 80h disable and no retry 58 e6h mfr_iout_uc_fault_ response configures the i out undercurrent fault response. r/w byte bit 80h disable and no retry 58 e7h iout_avg_oc_fault_ limit sets the i out average overcurrent fault threshold. r/w byte l11 e280h 40a 59 e8h iout_avg_uc_fault_ limit sets the i out average undercurrent fault threshold. r/w byte l11 dc40h -30a 59 e9h sync_config configures the sync pin. r/w byte bit 00h pin-strap 60 eah snapshot returns 32-byte read-back of parametric and status values. read block bit 60 ebh blank_params returns recently changed parameter values. read block bit ff...ffh 61 f3h snapshot_control snapshot feature control command. write byte bit 61 f4h restore_factory restores device to the factory default values. send byte 61 f5h vin_ov_fault_limit returns the v in overvoltage threshold. r/w word l11 ca40h 4.5v 61 f6h vin_uv_fault_limit returns the v in undervoltage threshold. r/w word l11 c266h 2.4v 62 f7h read_vin returns the v in voltage reading. read word l11 62 f8h vin_ov_fault_ response returns the v in overvoltage response. r/w byte bit 80h disable and no retry 62 f9h vin_uv_fault_ response returns the v in undervoltage response. r/w byte bit 80h disable and no retry 63 command code command name description type data format default value default setting page fn8837 rev. 2.00 page 31 of 73 jan 29, 2018 zl9024m 8. pmbus data formats 8. pmbus data formats linear-11 (l11) the l11 data format uses 5-bit t wos complement exponent (n) an d 11-bit twos complement mantissa (y) to represent real world decimal value (x). the relation between real world d ecimal value (x), n and y is: x = y2 n linear-16 unsigned (l16u) the l16u data format uses a fixed exponent (hard-coded to n = - 13h) and a 16-bit unsigned integer mantissa (y) to represent real world decimal valu e (x). relation between real w orld decimal value (x), n and y is: x = y2 -13 linear-16 signed (l16s) the l16s data format uses a fixed exponent (hard-coded to n = - 13h) and a 16-bit twos complement mantissa (y) to represent real world decimal value (x). relation between real world decima l value (x), n and y is: x = y2 -13 bit field (bit) a description of the bit field format is provided in the pmbus commands description on page 33 . custom (cus) a description of the custom data format is provided in the pmbus commands description on page 33 . a combination of bit field and inte ger are common type of custom data format. ascii (asc) a variable length string of text characters that u ses the ascii data format. data byte high data byte low exponen t ( n )mantissa ( y ) 76543210 76543210 fn8837 rev. 2.00 page 32 of 73 jan 29, 2018 zl9024m 9. pmbus use guidelines 9. pmbus use guidelines pmbus is a powerful tool that allows the user to optimize circu it performance by configur ing devices for their application. when configuring a device in a circuit, the device should be disabled whenever most settings are changed with pmbus commands. some excep tions to this recommendation are operation, on_off_config, clear_faults, vout_command, vout_margin_high, vout_margin_low, and ascr_config. while the device is enabled any command can be read. many comma nds do not take ef fect until after the device has been re-enabled, hence the recommendation that commands that ch ange device settings are w ritten while the device is disabled. when sending the store_default_a ll, store_user_all, restore_def ault_all, and restore_user_all commands, it is recommended that no other comm ands are sent to the d evice for 100ms after sending store or restore commands. in addition, there should be a 2 ms delay between repeated read commands sent to the same device. when sending any other command, a 5ms delay is recommended between repeated commands sent to the s ame device. commands not listed in the pmbus command summary (including efh, dbh, e3 h, and f1h) are not allow ed for customer use, and are reserved for factory use only. issuing reserved command s may result in unexpected operation. 9.1 summary all commands can b e read at any time. always disable the dev ice when writing comm ands that change dev ice settings. excepti ons to this rule are commands intended to be written while the device is enabled, fo r example, vou t_margin_high. to be sure a change to a device setting has taken effect, write the store_user_all command, then cycle input power and re-enable. fn8837 rev. 2.00 page 33 of 73 jan 29, 2018 zl9024m 10. pmbus commands description 10. pmbus commands description operation (01h) definition: sets enable, disable, and v out margin settings. data values of operation that force margin hi gh or low take effect only when the mgn pin is left open (that is, in the nominal margin state). data length in bytes : 1 data forma t: bit type : r/w default value : units : n/a on_off_config (02h) definition: configures the interpretation a nd coordination of the operatio n command and the enable pin (en). data length in bytes : 1 data format : bit type : r/w default value : 17h (device starts from enable pin with immediate off) units : n/a clear_faults (03h) definition : clears all fault bits in all re gisters and releases the salrt pin (if asserted) simu ltaneously. if a fault condition still exists, the bit will reassert immediately. this command will not restart a device if it has shut down, it will only clear the faults. data length in bytes : 0 byte data format : n/a type : write only default valu e: n/a units : n/a reference: n/a settings actions 04h immediate off (no sequencing) 44h soft off (with sequencing) 84h on - nominal 94h on - margin low a4h on - margin high settings actions 00h device starts any time power i s present regardless of enable pin or operation command states. 16h device starts from enable pin with soft off. 17h device starts from enable pin with immediate off. 1ah device starts from operation command. fn8837 rev. 2.00 page 34 of 73 jan 29, 2018 zl9024m 10. pmbus commands description store_user_all (15h) definition : stores all pmbus settings from the operating memory to the non-volatile user s tore memory. to clear the user store, perform a restore_fac tory then store_user_all. to a dd to the user store, perform a restore_user_all, write commands to be added, then store_user_a ll. this command can be used during device operation, but the device will be unresponsive for 20ms while storing values. data length in bytes : 0 data format : n/a type : write only default value : n/a units: n/a restore_user_all (16h) definition: restores all pmbus settings from the user store memory to the operating memory. command performed at power-up. security level is ch anged to level 1 following thi s command. this command can be used during device operation, but the device will be unresponsive for 20ms while s toring values. data length in bytes: 0 data format: n/a type: write only default value: n/a units: n/a vout_mode (20h) definition: reports the v out mode and provides the exponent used in calculating several v out settings. fixed with linear mode with default exponent (n) = -13 data length in bytes: 1 data format: bit type: read only default value: 13h (linear mode, n = -13) units: n/a vout_command (21h) definition: this command sets or reports the target output voltage. this c ommand cannot set a value higher than either vout_ma x or 110% of the pin-strap v out setting. data length in bytes: 2 data format: l16u type: r/w default value: pin-strap setting units: volts range: 0v to vout_max fn8837 rev. 2.00 page 35 of 73 jan 29, 2018 zl9024m 10. pmbus commands description vout_cal_offset (23h) definition: the vout_cal_offset command is u sed to apply a fixed offset vo ltage to the output voltage command value. this command is t ypically used by the user to ca librate a device in the application circuit. data length in bytes: 2 data format: l16s type: r/w default value: 0000h units: volts vout_max (24h) definition: the vout_ max command sets an upper limit on the output voltag e the unit can command regardless of any other commands or combinations. the intent of this command is to provide a safeguard against a user accidentally setting the output voltage to a possibly destructive level rath er than to be the primary out put overprotection. default value can be changed via pmbus. data length in bytes: 2 data format: l16u type: r/w default value: 1.10 x vout_command pin-strap setting units: volts range: 0v to 4v vout_margin_high (25h) definition: sets the value of the v out during a margin high. this vout _margin_high command loads the unit with the voltage to which the output is to be changed when the operation command is set to margin high. data length in bytes: 2 data format: l16u type: r/w word default value: 1.05 x vout_command pin-strap setting units: v range: 0v to vout_max vout_margin_low (26h) definition: sets the value of the v out during a margin low. this vout_margin_low command loads the uni t with the voltage to which the output is to be changed when the operation command is set to margin low. data length in bytes: 2 data format: l16u type: r/w default value: 0.95 x vout_command pin-strap setting units: v range: 0v to vout_max fn8837 rev. 2.00 page 36 of 73 jan 29, 2018 zl9024m 10. pmbus commands description vout_transition_rate (27h) definition: this command sets the rate at which the output should change v oltage when the device receives an operation command (margin high, margin low) that causes the out put voltage to change. the maximum possible positive value of the two data bytes indicates that the device should make the transition as quickly as possible. data length in bytes: 2 data format: l11 type: r/w default value: ba00h (1.0 v/ms) units : v/ms range: 0.1v/ms to 4v/ms vout_droop (28h) definition: the vout_droop sets the effective load line (v/i slope) for th e rail in which the device is used. it is the rate, in mv/a at which the out put voltage decreases (or increas es) with increasin g (or decreasing) output current for use with adaptive voltage positio ning requirements and passive current sharing schemes. data length in bytes: 2 data format: l11 type: r/w default value: 0000h (0mv/a) units: mv/a range: 0mv/a to 40mv/a frequency_switch (33h) definition: sets the switching frequency of t he device. initial default val ue is defined by a pin strap and this value can be overridden by writing this co mmand with pmbus. if an externa l sync is used, this value should be set as close as possible to the external clock value. the output must be disabl ed when writing this command. data length in bytes: 2 data format: l11 type: r/w default value: pin-strap setting units: khz range: 300khz to 1066mhz fn8837 rev. 2.00 page 37 of 73 jan 29, 2018 zl9024m 10. pmbus commands description interleave (37h) definition: configures the phase offset of a device that is sharing a commo n sync clock with other devices. a value of 0 for the number in group fie ld is interpreted as 16, to all ow for phase spreading group s of up to 16 devices. the current share devices then autom atically distribute their phase relative to the interleave setting. data length in bytes: 2 data format: bit type: r/w default value: default group number: 0 (00h) default number in group: 16 (00h) default position in group: four lsbs of smbus address units: khz iout_cal_gain (38h) definition: sets the effective impedance acros s the current sense circuit f or use in calculating output current at +25c. data length in bytes: 2 data format: l11 type : r/w default value: b29ah (0.65m) units: m iout_cal_offset (39h) definition: used to null out any offsets in the output current sensing cir cuit, and to compensate for delayed measurements of curr ent ramp due to i sense blanking time. data length in bytes: 2 data format: 11 type : r/w default value: 0000h (0a) units: a bits purpose value description 15:12 reserved 0 reserved 11:8 group number 0 to 15 not used 7:4 number in group 0 to 15 sets the number of rails in the group a value of 0 is interpreted as 16 3:0 position in group 0 to 15 sets position of the device's rail w ithin the group fn8837 rev. 2.00 page 38 of 73 jan 29, 2018 zl9024m 10. pmbus commands description vout_ov_fault_limit (40h) definition: sets the v out overvoltage fault threshold. data length in bytes: 2 data format: l16u type: r/w default value: 1.15 x vout_command pin-strap setting units: v range: 0v to vout_max vout_ov_fault_response (41h) definition: configures the v out overvoltage fault response. note that the device cannot be set to ignore this fault mode. data length in bytes: 1 data format: bit type: r/w default value: 80h (disable and no retry) units: n/a vout_ov_warning_limit (42h) definition: sets the v out overvoltage warning threshold. the power-good signal is pulled low when output voltage goes higher than this threshold. data length in bytes : 2 data format: l16u type: r/w default value: 1.1xvout_command pin-strap setting units: v range: 0v to vout_max bit field name value description 7:6 reserved 10 5:3 retry setting 000 no retry. the output remains disabled until the fault is cleared. 001-110 not used. 111 attempts to restart continuously, without checking if the fa ult is still present, until it is commanded off (by the contro l pin or operation command), bia s power is removed, or another fault condition causes the unit to shut down. 2:0 retry delay 000-111 retry delay time = (value + 1) * 35ms. set s the time between retries in 35ms fn8837 rev. 2.00 page 39 of 73 jan 29, 2018 zl9024m 10. pmbus commands description vout_uv_warning_limit (43h) definition: sets the v out undervoltage warning threshold. the power-good signal is pulled low when output voltage goes lower than this threshold. data length in bytes: 2 data format: l16u type: r/w default value: 0.9 x vout_command pin-strap setting units: v range: 0v to vout_max vout_uv_fault_limit (44h) definition: sets the v out undervoltage fault threshold. thi s fault is masked during ramp or when disabled. data length in bytes: 2 data format: l16u type: r/w default value: 0.85 x vout_command pin-strap setting units: v range: 0v to vout_max vout_uv_fault_response (45h) definition: configures the v out undervoltage fault response. data length in bytes: 1 data format: bit type: r/w default value: 80h (disable, no retry) units: n/a bit field name value description 7:6 reserved 10 5:3 retry setting 000 no retry. the output remains disabled until the fault is cleared. 001-110 not used. 111 attempts to restart continuously, without checking if the fa ult is still present, until it is commanded off (by the contro l pin or operation command), bia s power is removed, or another fault condition causes the unit to shut down. 2:0 retry delay 000-111 retry delay time = (value + 1) * 35ms. set s the time between retries in 35ms fn8837 rev. 2.00 page 40 of 73 jan 29, 2018 zl9024m 10. pmbus commands description iout_oc_fault_limit (46h) definition: sets the i out peak overcurrent fault threshold. this limit is applied to cur rent measurement samples taken after the current sense blanking time has expired. a fault occu rs after this limit is exceed ed. the recommended peak ocp limit is determined by (eq. 2) . this feature shares the oc fault bit operation (in status_iout) and oc fault response with the iout_avg_oc_fault_limit. data length in bytes: 2 data format: l11 type: r/w default value: e341h (52.062a) units: a range: -100a to 100a iout_uc_fault_limit (4bh) definition: sets the i out peak undercurrent fault threshol d. the device has a default pea k ucp limit. its value can be overridden by writing to the iout_uc_fault_limit register. data length in bytes: 2 data format: l11 type: r/w default value: e58fh (-39.062a) units: a range: -100a to 100a ot_fault_limit (4fh) definition: the ot_fault_limit command sets the temperature at which the de vice should i ndicate an over-temperature fault. note tha t the temperatur e must drop bel ow ot_warn_limit to clear this fault. data length in bytes: 2 data format: l11 type: r/w default value: eb98h (+115?c) units: celsius range: 0c to +175c iout_oc_fault_limit iout_avg_oc_fault_limit 0.5 iripple pp C ? + ?? 130% ? = (eq. 2) fn8837 rev. 2.00 page 41 of 73 jan 29, 2018 zl9024m 10. pmbus commands description ot_fault_response (50h) definition: the ot_fault_response command in structs the device on what acti on to take in r esponse to an over-temperature fault. data length in bytes: 1 data format: bit type : r/w fault value: 80h (disable and no retry) units: n/a ot_warn_limit (51h) definition: the ot_warn_limit command sets t he temperature at which the dev ice should indicate an over-temperature warning alarm. in response to the ot_warn_limi t being exceeded, th e device sets the temperature bit in status_word, s ets the ot_warni ng bit in stat us_temperature, and notifies the host. data length in bytes: 2 data format: linear-11 type : r/w default value: eb48h (+105c) units: celsius range : 0c to +175c ut_warn_limit (52h) definition: the ut_warn_limit command set th e temperature at which the devi ce should indicate an under-temperature warning alarm. in response to the ut_warn_lim it being exceeded, th e device sets the temperature bit in status_word, s ets the ut_warni ng bit in stat us_temperature, and notifies the host. data length in bytes: 2 data format: l11 type : r/w default value: e580h (-40c) units: celsius range : -55c to +25c bit field name value description 7:6 reserved 10 5:3 retry setting 000 no retry. the output remains disabled until the fault is cleared. 001-110 not used. 111 attempts to restart continuously, without checking if the fa ult is still present, until it is commanded off (by the contro l pin or operation command), bia s power is removed, or another fault condition causes the unit to shut down. 2:0 retry delay 000-111 retry delay time = (value + 1) * 35ms. set s the time between retries in 35ms fn8837 rev. 2.00 page 42 of 73 jan 29, 2018 zl9024m 10. pmbus commands description ut_fault_limit (53h) definition: sets the temperature, in degrees celsius, of the unit where it should indicate an under-temperature fault. note that the temperat ure must rise above u t_warn_limit to clea r this fault. data length in bytes: 2 data format: l11 type: r/w default value: e4e0h (-50c) units: celsius range: -55c to +25c ut_fault_response (54h) definition: configures the under-temperatur e fault response as defined by the following table. the delay time is the time between restart attempts. data length in bytes: 1 data format: bit type: r/w default value: 80h (disable, no retry) units: n/a vdrv_ov_fault_limit (55h) definition: sets the vdrv overvoltage fault threshold. data length in bytes: 2 data format: l11 type: read only default value: cb00h (6v) units: v range: 0v to 6v vdrv_ov_fault_response (56h) definition: reads the vdrv and vdd ov fault response. data length in bytes: 1 data format: bit type: read only default value: 80h (disable and no retry) units: n/a bit field name value description 7:6 reserved 10 5:3 retry setting 000 no retry. the output remains disabled until the fault is cleared. 001-110 not used. 111 attempts to restart continuously, without checking if the fa ult is still present, until it is commanded off (by the contro l pin or operation command), bia s power is removed, or another fault condition causes the unit to shut down. 2:0 retry delay 000-111 retry delay time = (value + 1) * 35ms. set s the time between retries in 35ms fn8837 rev. 2.00 page 43 of 73 jan 29, 2018 zl9024m 10. pmbus commands description vdrv_ov_warn_limit (57h) definition: sets the vdrv overvoltage warning threshold as defined by the t able below. in response to the ov_warn_limit be ing exceeded, the device sets the none of the a bove and input bits in status_word, sets the vdrv_ov_warning bit in status_vdrv, and n otifies the host. data length in bytes: 2 data format: l11 type : read only protectable: yes default value: cac0h (5.5v) units: v range : 0v to 6v vdrv_uv_warn_limit (58h) definition: sets the vdrv undervoltage warning threshold. if a vdrv_uv_faul t occurs, the input voltage must rise above vdrv_uv_warn_limit to clear the fault, which provide s hysteresis to the fault threshold. in response to the uv_warn_limit being exceeded, the device sets the none o f the above and vdrv bits in status_word, sets the vdrv_uv_warning bit in status_vdrv, and n otifies the host. data length in bytes: 2 data format: linear-11 type : read only default value: ca40h (4.5v) units: v range : 0v to 6v vdrv_uv_fault_limit (59h) definition: sets the vdrv undervoltage fault threshold. data length in bytes: 2 data format: l11 type: read only default value: ca00h (4v) units: v range: 0v to 6v vdrv_uv_fault_response (5ah) definition: reads the vdrv and vdd uv fault response. data length in bytes: 1 data format: bit type: read only default value: 80h (disable and no retry) units: n/a fn8837 rev. 2.00 page 44 of 73 jan 29, 2018 zl9024m 10. pmbus commands description power_good_on (5eh) definition: sets the voltage thre shold for power-good indication. power-go od asserts when the output voltage exceeds power_good_on and de-asser ts when the output voltage is less than vout_uv_fault_limit. data length in bytes: 2 data format: l16u type: r/w default value: 0.9 x vout_command pin-strap setting units: v ton_delay (60h) definition: sets the delay time from when t he device is ena bled to the sta rt of v out rise. data length in bytes: 2 data format: l11 type: r/w default value: 5 units: ms range: 0 to 255ms ton_rise (61h) definition: sets the rise time of v out after enable and ton_delay. data length in bytes: 2 data format: l11 type: r/w default value: 5 units: ms range: 0 to 200ms toff_delay (64h) definition: sets the delay time from disable to start of v out fall. data length in bytes: 2 data format: l11 type: r/w default value: 5 units: ms range: 0 to 255ms fn8837 rev. 2.00 page 45 of 73 jan 29, 2018 zl9024m 10. pmbus commands description toff_fall (65h) definition: sets the fall time for v out after disable and toff_delay. data length in bytes: 2 data format: l11 type: r/w default value: 5 units: ms range: 0 to 200ms status_byte (78h) definition: returns one byte of information with a summary of the most crit ical faults. data length in bytes: 1 data format: bit type: read only default value: 00h units: n/a bit number status bit name meaning 7 busy a fault was declared because the device was busy and unabl e to respond. 6 off this bit is asserted if the unit is not providing power to the output, regardless of the reason, including simply not being enabled. 5 vout_ov_fault an output overvoltage fault has occurred. 4 iout_oc_fault an output overcurrent fault has occurred. 3 vdrv_uv_fault a vdrv undervoltage fault has occurred. 2 temperature a temperature fault or warning has occurred. 1 cml a communications, memory or logic fault has occurred. 0 none of the above a fault or warning not listed in bits 7:1 has occurred. fn8837 rev. 2.00 page 46 of 73 jan 29, 2018 zl9024m 10. pmbus commands description status_word (79h) definition: returns two bytes of information with a summary of the unit's fault condition. based on the information in these bytes, the host can get mor e information by reading the a ppropriate status register s. the low byte of the status_word is the same register as the status_b yte (78h) comma nd. data length in bytes: 2 data format: bit type: read only default value: 0000h units: n/a bit number status bit name meaning 15 vout an output voltage fault or warning has occurred. 14 iout/pout an output current or output power fault or warning h as occurred. 13 vdrv a vdrv fault or warning has occurred. 12 input an input voltage fault or warning has occurred. 11 power_good# the power_good signal, if present, is negated. 10 fans a fan or airflow fault or warning has occurred. 9 other a bit in status_other is set. 8 unknown a fault type not given in bits 15:1 of the status_word has been detected. 7 busy a fault was declared bec ause the device was busy and unabl e to respond. 6 off this bit is asserted if the unit is not providing power to the output, regardless of the reason, including simply not being enabled. 5 vout_ov_fault an output overvoltage fault has occurred. 4 iout_oc_fault an output overcurrent fault has occurred. 3 vdrv_uv_fault a vdrv undervoltage fault has occurred. 2 temperature a temperature fault or warning has occurred. 1 cml a communications, memory or logic fault has occurred. 0 none of the above a fault or warning not listed in bits 7:1 has occurred. fn8837 rev. 2.00 page 47 of 73 jan 29, 2018 zl9024m 10. pmbus commands description status_vout (7ah) definition: returns one data byte with the status of the output voltage. data length in bytes: 1 data format: bit type: read only default value: 00h units: n/a status_iout (7bh) definition: returns one data byte with the status of the output current. data length in bytes: 1 data format: bit type: read only default value: 00h units: n/a bit number status bit name meaning 7 vout_ov_fault indicates an output overvoltage fault. 6 vout_ov_warning indicates an output overvoltage warning. 5 vout_uv_warning indicates an output undervoltage warning. 4 vout_uv_fault indicates an output undervoltage fault. 3:0 n/a these bits are not used. bit number status bit name meaning 7 iout_oc_fault an output overcurrent fault has occurred. 6 iout_oc_lv_fault an output overcurrent and low voltage fault ha s occurred. 5 iout_oc_warning an output overcurrent warning has occurred. 4 iout_uc_fault an output undercurrent fault has occurred. 3:0 n/a these bits are not used. fn8837 rev. 2.00 page 48 of 73 jan 29, 2018 zl9024m 10. pmbus commands description status_vdrv (7ch) definition: returns input voltage and input current status information. data length in bytes: 1 data format: bit type: read only default value: 00h units: n/a status_temp (7dh) definition: returns one byte of information with a summary of any temperat ure related faults or warnings. data length in bytes: 1 data format: bit type: read only default value: 00h units: n/a bit number status bit name meaning 7 vdrv_ov_fault a vdrv overvoltage fault has occurred. 6 vdrv_ov_warning a vdrv overvoltage warning has occurred. 5 vdrv_uv_warning a vdrv undervoltage warning has occurred. 4 vdrv_uv_fault a vdrv undervoltage fault has occurred. 3:0 n/a these bits are not used. bit number status bit name meaning 7 ot_fault an over-temperature fault has occurred. 6 ot_warning an over-temperature warning has occurred. 5 ut_warning an under-temperature warning has occurred. 4 ut_fault an under-temperature fault has occurred. 3:0 n/a these bits are not used. fn8837 rev. 2.00 page 49 of 73 jan 29, 2018 zl9024m 10. pmbus commands description status_cml (7eh) definition: returns one byte of information with a summary of any communic ations, logic, and/or memory errors. data length in bytes: 1 data format: bit type: read only default value: 00h units: n/a status_input (80h) definition: returns one byte of information p roviding the status of the dev ice's voltage monitoring and clock synchronization faults. data length in bytes: 1 data format: bit type: read only default value: 00h units: n/a bit number meaning 7 invalid or unsupported pmbus command was received. 6 the pmbus command was sent with invalid or unsupported data. 5 a packet error was detected in the pmbus command. 4:2 not used. 1 a pmbus command tried to write to a read only or protected com mand, or a communication fault other than the ones listed in this table has occurred. 0 not used. bit number field name meaning 7:6 reserved 5 vin uv warning the voltage on the vmon pin has dropped below th e level set by vin_uv_fault_limit. 4 vin ov warning the voltage on the vmon pin has risen above the level set by vin_ov_fault_limit. 3 external switching period fault loss of external clock synchro nization has occurred. 2 reserved 1 vin uv fault the voltage on the vmon pin has dropped below the level set by vin_uv_fault_limit. 0 vin ov fault the voltage on the vmon pin has risen above the le vel set by vin_ov_fault_limit. fn8837 rev. 2.00 page 50 of 73 jan 29, 2018 zl9024m 10. pmbus commands description read_vdrv (88h) definition: returns the vdrv voltage reading. data length in bytes: 2 data format: l11 type: read only units: v read_vout (8bh) definition: returns the output voltage reading. data length in bytes: 2 data format: l16u type: read only units: v read_iout (8ch) definition: returns the output current reading. data length in bytes: 2 data format: l11 type: read only default value: n/a units: a read_temperature_1 (8dh) definition: returns the controller junction temperature read ing from inter nal temperature sensor. data length in bytes: 2 data format: l11 type: read only units: c read_temperature_2 (8eh) definition: returns the temperature reading from the external temperature device connected to the xtemp pins. data length in bytes: 2 data format: l11 type: read only units: c read_duty_cycle (94h) definition: reports the actual duty cycle of the converter dur ing the enabl e state. data length in bytes: 2 data format: l11 type: read only units: % fn8837 rev. 2.00 page 51 of 73 jan 29, 2018 zl9024m 10. pmbus commands description read_frequency (95h) definition: reports the actual switching fre quency of the converter during the enable state. data length in bytes: 2 data format: l11 type: read only units: khz mfr_id (99h) definition: sets a user defined m anufacturer identification. the sum total of characters in mf r_id, mfr_model, mfr_revision, mfr_loca tion, mfr_date, mfr_serial and user_data_ 00 plus one byte per command cannot exceed 128 character s. this limitation includes multiple writes of this command before a store command. to clear multiple writes, perform a restore, write thi s command, then perform a store/restore. data length in bytes: user defined data format: ascii type: block r/w default value: null units: n/a mfr_model (9ah) definition: sets a user defined model. the s um total of characters in mfr_ id, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_seria l and user_data_00 plus one by te per command cannot exceed 128 characters. this limitation includes multiple writes of thi s command before a store command. to clear multiple writes, perform a restore, writ e this command, then perform a s tore/restore. data length in bytes: user defined data format: asc type: block r/w default value: null units: n/a mfr_revision (9bh) definition: sets a user defined revision. th e sum total of c haracters in mf r_id, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_seria l and user_data_00 plus one by te per command cannot exceed 128 characters. this limitation includes multiple writes of thi s command before a store command. to clear multiple writes, perform a restore, writ e this command, then perform a s tore/restore. data length in bytes: user defined data format: asc type: block r/w default value: null units: n/a fn8837 rev. 2.00 page 52 of 73 jan 29, 2018 zl9024m 10. pmbus commands description mfr_location (9ch) definition: sets a user defined l ocation identifier. the sum total of char acters in mfr_id, mfr_model, mfr_revision, mfr_loca tion, mfr_date, mfr_serial and user_data_ 00 plus one byte per command cannot exceed 128 character s. this limitation includes multiple writes of this command before a store command. to clear multiple writes, perform a restore, write thi s command, then perform a store/restore. data length in bytes: user defined data format: asc type: block r/w default value: null units: n/a mfr_date (9dh) definition: sets a user defined date. the s um total of characters in mfr_i d, mfr_model, mfr_revision, mfr_location, mfr_date, mfr_seria l and user_data_00 plus one by te per command cannot exceed 128 characters. this limitation includes multiple writes of thi s command before a store command. to clear multiple writes, perform a restore, writ e this command, then perform a s tore/restore. data length in bytes: user defined data format: asc type: block r/w default value: null units: n/a reference: n/a mfr_serial (9eh) definition: sets a user defined s erialized identifier. the sum total of ch aracters in mfr_id, mfr_model, mfr_revision, mfr_loca tion, mfr_date, mfr_serial and user_data_ 00 plus one byte per command cannot exceed 128 character s. this limitation includes multiple writes of this command before a store command. to clear multiple writes, perform a restore, write thi s command, then perform a store/restore. data length in bytes: user defined data format: asc type: block r/w default value: null units: n/a legacy_fault_group (a8h) definition: sets rail ids of legacy dev ices for fault spreading. data format: bit type: block r/w default value: 00000000h units: n/a fn8837 rev. 2.00 page 53 of 73 jan 29, 2018 zl9024m 10. pmbus commands description ic_device_id (adh) definition: reports device identi fication information data length in bytes: 4 data format: cus type: block read default value: 49b01500h (renesas zl9024m) units: n/a user_data_00 (b0h) definition: sets a user defined data. the su m total of char acters in mfr_id , mfr_model, mfr_revision, mfr_location, mfr_date, mfr_seria l and user_data_00 plus one by te per command cannot exceed 128 characters. this limitation includes multiple writes of thi s command before a store command. to clear multiple writes, perform a restore, writ e this command, then perform a s tore/restore. data length in bytes: user defined data format: ascii type: block r/w default value: null units: n/a isense_config (d0h) definition: configures current sense circuitry. data length in bytes: 1 data format: bit type: r/w byte default value: 25h units: n/a bit field name value setting description 7:4 reserved 00100101 3:2 current sense blanking time 00 192ns sets the blanking time current sense blanking time. 01 256ns 10 412ns 11 640ns 1:0 current sense range 00 low range 25mv 01 mid range 35mv 10 high range 50mv 11 not used fn8837 rev. 2.00 page 54 of 73 jan 29, 2018 zl9024m 10. pmbus commands description user_config (d1h) definition: configures several user-level f eatures. this command overrides the config pin settings. data length in bytes: 1 data format: bit type: r/w default value: 00h units: n/a ddc_config (d3h) definition: configures ddc addressing and current sharing. data length in bytes: 2 data format: bit type: r/w default value: 0000h units: n/a bit field name value setting description 7:5 reserved 0 reserved. 4:3 ramp-up and ramp-down minimum duty cycle 00 0.39% sets the minimum duty-cycle during start-up and shutdown ramp. must be enabled with bit 10. 01 0.78% 10 1.17% 11 1.56% 2 minimum duty cycle control 0 disable control for mi nimum duty cycle. 1 enable 1 power-good pin configuration 0 open drain 0 = pg is open drain output. 1 = pg is push-pull output. 1 push-pull 0 xtemp enable 0 disable enables ext ernal temperature monitoring. 1 enable bit field name value setting description 15:13 phase id 0 to 7 0 sets the output's phase position within the group. 12:8 rail id 0 to 31 (00 to 1fh) 0 identifies the device as part of a current sharing rail (shared output). 7:3 reserved 00 reserved reserved. 2:0 devices in rail 0 to 7 0 identifies the number of devices on th e same rail (+1). fn8837 rev. 2.00 page 55 of 73 jan 29, 2018 zl9024m 10. pmbus commands description power_good_delay (d4h) definition: sets the delay applied between t he output exceeding the pg thr eshold (power_good_on) and asserting the pg pin. the delay time can range from 0ms up to 5 000ms, in steps of 125ns. a 1ms minimum configured value is recommended to apply pr oper de-bounce to this signal. data length in bytes: 2 data format: l11 type: r/w default value: 1ms units: ms range: 0 to 5000ms ascr_config (dfh) definition: allows user configuration of ascr settings. data length in bytes: 4 data format: cus type: r/w default value: 01500258h bit purpose data format value description 31:25 unused 0000000h unused 24 ascr enable bit 1 enable 0 disable 23:16 ascr residual setting integer 15:0 ascr gain setting integer fn8837 rev. 2.00 page 56 of 73 jan 29, 2018 zl9024m 10. pmbus commands description sequence (e0h) definition: identifies the rail ddc id of the prequel and sequel rails whe n performing multi-rail sequencing. the device will enable its output whe n its en or operation enable s tates, as defined by on_ off_config, is set and the prequel device has issued a p ower-good event on the ddc bus . the device will disable its output (using the programmed delay values) when th e sequel device has issued a po wer-down event on the ddc bus. the data field is a two-byte value. the most-significant byte c ontains the 5-bit rail ddc id of the prequel device. the least-significant byte contains the 5-bit rail ddc id of the se quel device. the most sign ificant bit of each byte contains the enable of the prequ el or sequel mode. this command overrides the corresponding sequence configuration set by the config pin settings. data length in bytes: 2 data format: bit type: r/w default value: 0000h (prequel and sequel disabled) track_config (e1h) definition: configures the voltage tracking modes of the dev ice. tracking is not supported when the zl9024m is in current sharing configuration. data length in bytes: 1 data format: bit type: read only default value: 00h (tracking disabled) bit field name value setting description 15 prequel enable 0 disable disable, no prequel preceding this rail . 1 enable enable, prequel to this rail is defined by bits 12:8. 14:13 reserved 0 reserved reserved. 12:8 prequel rail ddc id 0-31 ddc id set to the ddc id of the prequel rail. 7 sequel enable 0 disable disable, no sequel following this rail. 1 enable enable, sequel to this rai l is defined by bits 4:0. 6:5 reserved 0 reserved reserved. 4:0 sequel rail ddc id 0-31 ddc id set to the ddc id of the sequel rail. fn8837 rev. 2.00 page 57 of 73 jan 29, 2018 zl9024m 10. pmbus commands description ddc_group (e2h) definition: configures fault spreading grou p id and enable, broadcast oper ation group id and enable, and broadcast vout_command group id and enable. data length in bytes : 4 data format: bit type: r/w default value: 00000000h (ignore broadcast vout_command and operation, sequen ce shutdown on power_fail event) device_id (e4h) definition: returns the 16-byte (charact er) device identifier string. data length in bytes: 16 data format: ascii type: block read default value: part number/die revision/firmware revision bits purpose value description 31:22 reserved 0 reserved 21 broadcast_vout_command response 1 responds to broadcast_vout_command with same group id. 0 ignores broadcast_vout_command. 20:16 broadcast_vout_command group id 0-31d group id sent as data for broadcast broadcast_vout_command events. 15:14 reserved 0 reserved. 13 broadcast_operation response 1 responds to broadcast_oper ation with same group id. 0 ignores broadcast_operation. 12:8 broadcast_operation group id 0-31d group id sent as data for broadcast broadcast_operation events. 7:6 reserved 0 reserved. 5 power_fail response 1 responds to power_fail events with same gr oup id by shutting down immediately. 0 responds to power_fail events with same group id with sequence d shutdown. 4:0 power_fail group id 0-31d group id sent as data for broadcast power_fail events. fn8837 rev. 2.00 page 58 of 73 jan 29, 2018 zl9024m 10. pmbus commands description mfr_iout_oc_fault_response (e5h) definition: configures the i out overcurrent fault response as de fined by the following table. the command format is the same as the pmbus standard f ault responses except that it s ets the overcurrent status bit in status_iout. data length in bytes: 1 data format: bit type: r/w default value: 80h (disable, and no retry) units: n/a mfr_iout_uc_fault_response (e6h) definition: configures the i out undercurrent fault response as de fined by the following table. the command format is the same as the pmbus standard f ault responses except that it s ets the undercurrent stat us bit in status_iout. data length in bytes: 1 data format: bit type: r/w default value: 80h (disable and no retry) units: n/a bit field name value description 7:6 reserved 10 5:3 retry setting 000 no retry. the output remains disabled until the fault is cleared. 001-110 not used. 111 attempts to restart continuously, without checking if the fa ult is still present, until it is commanded off (by the contro l pin or operation command), bia s power is removed, or another fault condition causes the unit to shut down. 2:0 retry delay 000-111 retry delay time = (value + 1) * 35ms. set s the time between retries in 35ms increments. range is 35ms to 280ms. bit field name value description 7:6 reserved 10 5:3 retry setting 000 no retry. the output remains disabled until the fault is cleared. 001-110 not used. 111 attempts to restart continuously, without checking if the fa ult is still present, until it is commanded off (by the contro l pin or operation command), bia s power is removed, or another fault condition causes the unit to shut down. 2:0 retry delay 000-111 retry delay time = (value + 1) * 35ms. set s the time between retries in 35ms increments. range is 35ms to 280ms. fn8837 rev. 2.00 page 59 of 73 jan 29, 2018 zl9024m 10. pmbus commands description iout_avg_oc_fault_limit (e7h) definition: sets the i out average overcurrent fault threshold. for down-slope sensing, t his corresponds to the average of all the current samples taken during the (1-d) time interval , excluding the current sense blanking time (which occurs at the beginning of the 1-d inte rval). for up-slope sensing, th is corresponds to the average of all the current samples taken during the d time interval, excluding the current sense b lanking time (which occurs at the beginning of the d interval). this featur e shares the oc fault bit operation (in s tatus_iout) and oc fau lt response with iout_ oc_fault_limit. paged or global: paged data length in bytes: 2 data format: l11 type: r/w protectable: yes default value: e280h units: a equation: iout_avg_oc_fault_limit = y2n range: -100a to 100a iout_avg_uc_fault_limit (e8h) definition: sets the i out average undercurrent fault thr eshold. for down-slope sensing, this corresponds to the average of all the current sampl es taken during the (1-d) time interval, excluding the curr ent sense blanking time (which occurs at the beginning of the 1-d interval). for up-slo pe sensing, this corresponds to the average of all the current samples taken during the d time interval, excluding the current sense blanking time (which occurs at the beginning of the d interval). this feature shares the uc fault bit operation (in status_iout) and uc fault response with iout_ uc_fault_limit. paged or global: paged data length in bytes: 2 data format: l11 type: r/w protectable: yes default value: dc40h units: a equation: iout_avg_uc_fault_limit = y2n range: -100a to 100a fn8837 rev. 2.00 page 60 of 73 jan 29, 2018 zl9024m 10. pmbus commands description sync_config (e9h) definition: sets options for sync output configurations. data length in bytes: 1 data format: bit type: r/w default value: 00h snapshot (eah) definition: a 32-byte read-back of parametric and status values. it allows monitoring and status data to be stored to flash either during a fault cond ition or via a system-defined t ime using the snapshot_control command. in case of a fault, last updated val ues are stored to the flash me mory. use snapshot_cont rol command to read stored values. data length in bytes: 32 data format: bit field type: block read settings actions 00h use internal clock. clock frequency is set by pin strap or p mbus command. 02h use internal clock and output internal clock. 04h use external clock. byte number value pmbus command format 31:22 nvm status byte reserved 00h 21 input status byte status_input (80h) byte 20 cml status byte status_cml (7eh) byte 19 temperature status byte status_temperature (7dh) byte 18 vdrv status byte status_vdrv (7ch) byte 17 i out status byte status_iout (7bh) byte 16 v out status byte status_vout (7ah) byte 15:14 switching frequency read_frequency (95h) l11 13:12 external temperature read_temperature_2 (8eh) l11 11:10 internal temperature read_temperature_1 (8dh) l11 9:8 duty cycle read_duty_cycle (94h) l11 7:6 peak current n/a l11 5:4 load current read_iout (8ch) l11 3:2 v out read_vout (8bh) l16u 1:0 v drv read_vdrv (88h) l11 fn8837 rev. 2.00 page 61 of 73 jan 29, 2018 zl9024m 10. pmbus commands description blank_params (ebh) definition: returns a 16-byte string indicating which parameter values were either retrieved by the last restore operation or have been written since that time. reading blank_p arams immediately afte r a restore operation allows the user to determine whi ch parameters are stored in tha t store. a 1 indicates the par ameter is not present in the store and has not been written s ince the restore operation. data length in bytes: 16 data format: bit type: block read default value: ffffh snapshot_control (f3h) definition: using snapshot_control command st ored parametric and status va lues in snapshot command can be moved from flash to ram fo r a read, store latest paramet ric and status values from ram to flash, or erase parametric and status values store in the flash. when parametri c and status values is upda ted to the snapshot, it overwrites stored parametric and status values. data length in bytes: 1 data format: bit field type: r/w restore_factory (f4h) definition: restores the device to the hard- coded factory default values a nd pin-strap definitions. the device retains the default and user stores for restori ng. security level is ch anged to level 1 following this command. data length in bytes: 0 data format: n/a type: write only default value: n/a units: n/a vin_ov_fault_limit (f5h) definition: reads the vin ov fault threshold. data length in bytes: 2 data format: l11 type: r/w default value: 4.5v units : v range: 0v to 5v value description 01h move parametric and status values from flash to the ram. 02h move latest parametric and status values from ram to the fla sh. 03h erase parametric and status values stored in snapshot. fn8837 rev. 2.00 page 62 of 73 jan 29, 2018 zl9024m 10. pmbus commands description vin_uv_fault_limit (f6h) definition: reads the vin uv fault threshold data length in bytes: 2 data format: l11 type: r/w default value: 2.4v units: v range: 0v to 5v read_vin (f7h) definition: reads the vdrv voltage. data length in bytes: 2 data format: l11 type: read only default value: n/a units: v range: 0v to 4.5v vin_ov_fault_response (f8h) definition: configures the v in overvoltage fault response as def ined by the following table. t he delay time is the time between restart attempts. data length in bytes: 1 data format: bit type: r/w default value: 80h (disable and no retry) units: n/a bit field name value description 7:6 reserved 10 5:3 retry setting 000 no retry. the output remains disabled until the fault is cleared. 001-110 not used. 111 attempts to restart continuously, without checking if the fa ult is still present, until it is commanded off (by the contro l pin or operation command), bia s power is removed, or another fault condition causes the unit to shut down. 2:0 retry delay 000-111 retry delay time = (value + 1) * 35ms. set s the time between retries in 35ms increments. range is 35ms to 280ms. fn8837 rev. 2.00 page 63 of 73 jan 29, 2018 zl9024m 10. pmbus commands description vin_uv_fault_response (f9h) definition: configures the v in undervoltage fault response as de fined by the following table. the delay time is the time between restart attempts. data length in bytes: 1 data format: bit type: r/w default value: 80h (disable and no retry) units: n/a bit field name value description 7:6 reserved 10 5:3 retry setting 000 no retry. the output remains disabled until the fault is cleared. 001-110 not used. 111 attempts to restart continuously, without checking if the fa ult is still present, until it is commanded off (by the contro l pin or operation command), bia s power is removed, or another fault condition causes the unit to shut down. 2:0 retry delay 000-111 retry delay time = (value + 1) * 35ms. set s the time between retries in 35ms increments. range is 35ms to 280ms. fn8837 rev. 2.00 page 64 of 73 jan 29, 2018 zl9024m 11. firmware revision history 11. firmware revision history firmware revision code change description note zl9024m-0-g0100 initial release fn8837 rev. 2.00 page 65 of 73 jan 29, 2018 zl9024m 12. package outline drawing 12. package outline drawing y40.17x19 40 i/o 17.0mm x 19.0mm x 3.55mm hda module rev 3, 4/17 3.55 0.5 0.025 max c side view seating detail a 2x terminal #a1 index area 2x a b top view 1. all dimensions are in millimeters. 3. the total number of i /o (excluding dummy pads) notes: 6. the configuration of the pin#1 identif ier is optional, but m ust be either a mold or mark feature. 0.20 ref 20 x 0.60 0.05 3 3 terminal typ 16.50 0.15 bottom view pin 1 indicator datum b datum a 0.30 ref see detail a 9.00 located within the zone indicated . the pin #1 identifier may be 0.30 ref 4. unless otherwise specifi ed, tolerance: decimal 0.10 20 x 0.60 0.05 0.20 ref 1.00 bsc 1.00 bsc 2. represents the basic land grid pitch. 2 2 5. dimensioning and tole rancing per asme y14.m-2009 0.20 ref a b c d e f g h j k l m n p r t u v w 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 19.00 bsc 17.00 bsc 0.10 c 0.10 c 0.08 c b c 0.10 m a m 0.05 c 0.10 c 8.00 b c 0.10 m a 18.50 0.15 b c 0.10 m a plane for the most recent package outline drawing, see y40.17x19 . fn8837 rev. 2.00 page 66 of 73 jan 29, 2018 zl9024m 12. package outline drawing size details for t he 16 exposed daps 2.50 0.60 1.50 7.60 4x 4x 1.60 5.10 5.10 0.60 0.80 8.20 3.50 3.00 10.00 5.80 1.50 2.00 2.70 3.00 1.80 0.70 3.05 0.70 4.80 8.20 1.60 0.60 1.00 0.60 2.00 4.90 1.40 2.00 1.00 0.60 0.60 1.60 2x 1.60 2x 0.60 0.60 0.80 bottom view 1.35 2.975 1.30 1.10 3.30 fn8837 rev. 2.00 page 67 of 73 jan 29, 2018 zl9024m 12. package outline drawing size details for t he 16 exposed daps 2.50 0.60 1.50 7.60 4x 4x 1.60 5.10 5.10 0.60 0.80 8.20 3.50 3.00 10.00 5.80 1.50 2.00 2.70 3.00 1.80 0.70 3.05 0.70 4.80 8.20 1.60 0.60 1.00 0.60 2.00 4.90 1.40 1.00 0.60 0.60 1.60 2x 1.60 2x 0.60 0.60 0.80 top view 1.10 3.30 1.30 1.35 2.975 2.00 fn8837 rev. 2.00 page 68 of 73 jan 29, 2018 zl9024m 12. package outline drawing 0.000 0.000 0.000 0.000 recommended solder mas k defined pcb land pa ttern (sheet 1 of 2) top view 8.500 8.200 7.050 6.850 6.700 5.700 5.300 4.700 4.300 3.700 3.300 2.700 2.300 1.700 1.300 0.700 0.300 0.300 0.700 1.300 1.700 2.300 2.700 3.300 3.700 4.300 4.700 5.300 5.700 6.700 8.300 8.500 6.300 7.700 9.500 9.300 8.700 8.300 7.700 7.300 6.700 6.300 5.700 5.300 4.700 4.300 3.700 3.300 2.700 0.044 0.556 0.400 1.400 2.000 6.150 7.575 7.775 5.900 7.900 8.500 9.200 9.500 1.000 2.675 3.275 4.625 8.500 8.300 7.600 7.400 5.550 5.350 5.100 4.900 3.500 3.000 2.800 1.600 0.200 1.400 1.600 3.000 4.700 6.350 6.550 8.200 6.300 1.000 2.700 8.500 9.500 9.200 7.300 7.100 5.200 5.000 3.100 2.900 1.000 0.300 1.450 1.650 3.400 3.600 5.350 5.550 7.300 8.700 9.300 9.500 8.300 7.700 5.900 7.450 7.650 4.400 5.400 4.025 1.100 fn8837 rev. 2.00 page 69 of 73 jan 29, 2018 zl9024m 12. package outline drawing 0.000 0.000 0.000 0.000 recommended solder mas k defined pcb land pa ttern (sheet 2 of 2) top view 6.000 5.200 2.200 0.633 0.433 1.133 1.333 2.550 2.900 7.300 6.300 7.100 6.750 5.533 5.333 3.767 3.567 2.000 2.300 1.700 1.100 0.900 0.300 0.900 2.500 3.500 3.700 5.200 5.300 4.700 2.900 1.300 1.700 3.300 3.700 5.300 5.700 6.900 6.700 0.300 7.300 6.300 fn8837 rev. 2.00 page 70 of 73 jan 29, 2018 zl9024m 12. package outline drawing 0.000 0.000 0.000 recommended stencil pa ttern (90% paste to pad) (sheet 1 of 2) top view 8.500 8.180 7.070 6.830 5.720 5.280 4.720 4.285 3.715 3.285 2.715 2.285 1.715 1.285 0.715 0.285 0.285 0.715 1.285 1.715 2.285 2.715 3.285 3.715 4.285 4.715 5.285 5.715 6.285 6.720 8.280 8.500 6.740 7.715 9.500 9.280 8.720 8.280 7.720 7.285 6.715 6.285 5.715 5.285 4.715 4.285 3.715 3.285 2.715 1.420 5.940 0.980 0.420 0.536 0.024 5.380 4.420 2.680 9.500 8.720 7.720 7.260 5.590 3.640 3.360 1.690 1.410 0.260 1.040 2.860 3.140 4.960 5.240 8.285 6.320 5.310 1.980 8.280 0.000 1.120 fn8837 rev. 2.00 page 71 of 73 jan 29, 2018 zl9024m 12. package outline drawing 0.000 recommended stencil pa ttern (90% paste to pad) (sheet 2 of 2) top view 5.970 5.230 2.160 0.673 0.393 1.093 1.373 2.533 2.860 6.330 8.270 7.270 7.730 2.270 1.730 0.930 1.070 0.270 0.870 3.740 5.160 4.610 4.040 3.260 2.690 2.770 1.630 1.370 0.230 1.015 1.585 5.730 7.270 5.270 3.730 3.270 1.730 1.270 0.270 6.733 5.573 5.293 3.807 3.527 2.040 2.940 4.660 6.660 6.940 5.340 8.260 6.330 7.060 2.530 3.470 5.930 7.420 7.680 9.170 fn8837 rev. 2.00 page 72 of 73 jan 29, 2018 zl9024m 13. revision history 13. revision history rev. date change 2.00 jan 29, 2018 updated ordering information table, added zl902 4meval1z. changed the uvlo pin to nc on page 6. added a row describing the vmon pin (22) on page 7. removed the uvlo pin description on page 7. added pin 29 to nc row on page 7. removed the uvlo pin from the ty pical application circuit on pa ge 8. removed uvlo from the logic i/o voltage list on page 10. changed the uvlo pin to nc in figure 19 on page 24. added renesas disclaimer. 1.00 dec 20, 2017 added table 1 (key differences between family o f parts) to page 5. 0.00 dec 13, 2017 initial release http://www.renesas.com refer to "http://www.renesas.com/" for the latest and detailed information. renesas electronics america inc. 1001 murphy ranch road, milpitas, ca 95035, u.s.a. tel: +1-408-432-8888, fax: +1-408-434-5351 renesas electronics canada limited 9251 yonge street, suite 8309 richmond hill, ontario canada l4c 9t3 tel: +1-905-237-2004 renesas electronics europe limited dukes meadow, millboard road, bourne end, buckinghamshire, sl8 5fh, u.k tel: +44-1628-651-700, fax: +44-1628-651-804 renesas electronics europe gmbh arcadiastrasse 10, 40472 dsseldorf, germany tel: +49-211-6503-0, fax: +49-211-6503-1327 renesas electronics (china) co., ltd. room 1709 quantum plaza, no.27 zhichunlu, haidian district, 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100 feet road, hal 2nd stage, indiranagar, bangalore 560 038, india tel: +91-80-67208700, fax: +91-80-67208777 renesas electronics korea co., ltd. 17f, kamco yangjae tower, 262, gangnam-daero, gangnam-gu, seoul, 06265 korea tel: +82-2-558-3737, fax: +82-2-558-5338 sales offices ? 2018 renesas electronics corporation. all rights reserved. colophon 7.0 (rev.4.0-1 november 2017) notice 1. descriptions of circuits, software and other related information in this document are provided only to illustrate the operat ion of semiconductor products and application examples. you are fully responsible for the incorporation or any other use of the circuits, software, and information in the design of your product or system. renesas electronics disclaims any and all liability for any losses and damages incurred by you or third parties arising from the use of these circuits, software, or information. 2. renesas electronics hereby expressly disclaims any warranties against and liability for infringement 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